📄 sysnetif.c
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/* sysNetif.c - system network interface support library *//* Copyright 1989-1999 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01q,12mar99,jkf renamed boardResource and pciResources to dev specific.01p,09mar99,sbs moved sysEltIntEnable and sysEltIntDisable to sysElt3c509End.c corrected previous version number.01o,08feb99,jkf removed PCI_CFG_* definitions, now set in configAll.h01n,01feb99,jkf added support for AMD 7997x PCI card.01m,26nov98,ms_ add support for end enabled elt3c50901l,27aug98,dat fixed conflicting symbols from if_fei.h and fei8255701k,16apr98,cn added import of feiIntConnect, feiEndIntConnect and feiEndIntDisconnect and their initialisation.01g,31mar98,cn Added enhanced network driver support, changed BOARD_INFO in FEI_BOARD_INFO if INCLUDE_FEI_END is defined.01f,17mar98,sbs moved PRO100B PCI definitions to if_fei.h. documentation corrections.01e,03mar98,sbs removed update of mmu table entries. using sysMmuMapAdd() for adding mmu entries. added extra members to feiResource structure. changed initialization of feiResources arrray. 01d,03dec96,hdn changed UINT32 to INT32 for timeout, str[6], *pResults. added sys557PciInit(). added configType to the resource.01c,20nov96,dat chg'd name to sysNetif.c, incorporated #defines and struct typedefs from header file. Combines old if_eex32.c and if_i82557.c files.01b,07nov96,hdn re-written.01a,31aug96,dzb written, based on v01a of src/drv/netif/if_iep.c.*//*Currently, this module only supports the Intel EtherExpress PRO100B LANAdapter. If support for more 82557-based adapters is desired, this modulemust be modified.SEE ALSO: ifLib,.I "Intel 82557 User's Manual,".I "Intel PRO100B PCI Adapter Driver Technical Reference,"*/#include "vxWorks.h"#include "taskLib.h"#include "sysLib.h"#include "config.h"#ifdef INCLUDE_FEI_END /* END-style Intel 82557 (Fast EI) Support */# include "drv/end/fei82557End.h"#else /* INCLUDE_FEI_END */# include "drv/netif/if_fei.h"#endif /* imports */#ifdef INCLUDE_FEI /* Intel 82557 (Fast EI) Support */IMPORT FUNCPTR feiIntConnect;#endif /* INCLUDE_FEI */#ifdef INCLUDE_FEI_END /* END-style Intel 82557 (Fast EI) Support */IMPORT FUNCPTR feiEndIntConnect;IMPORT FUNCPTR feiEndIntDisconnect;#endif /* INCLUDE_FEI_END */#if defined (INCLUDE_FEI) || defined (INCLUDE_FEI_END)/* defines */#ifdef I82557_DEBUG# undef LOCAL# define LOCAL#endif /* I82557_DEBUG *//* Intel EtherExpress PRO100B LAN Adapter type */#define TYPE_PRO100B_PCI 1 /* Intel EtherExpress PRO-100B PCI *//* EEPROM control bits */#define EE_SK 0x01 /* shift clock */#define EE_CS 0x02 /* chip select */#define EE_DI 0x04 /* chip data in */#define EE_DO 0x08 /* chip data out *//* EEPROM opcode */#define EE_CMD_WRITE 0x05 /* WRITE opcode, 101 */#define EE_CMD_READ 0x06 /* READ opcode, 110 */#define EE_CMD_ERASE 0x07 /* ERASE opcode, 111 *//* EEPROM misc. defines */#define EE_CMD_BITS 3 /* number of opcode bits */#define EE_ADDR_BITS 6 /* number of address bits */#define EE_DATA_BITS 16 /* number of data bits */#define EE_SIZE 0x40 /* 0x40 words */#define EE_CHECKSUM 0xbaba /* checksum *//* unknown values */#define UNKNOWN -1/* typedefs */typedef struct feiResource /* FEI_RESOURCE */ { UINT32 membaseCsr; /* Base Address Register 0 */ UINT32 iobaseCsr; /* Base Address Register 1 */ UINT32 membaseFlash; /* Base Address Register 2 */ char irq; /* Interrupt Request Level */ UINT32 configType; /* type of configuration - unused */ UINT32 boardType; /* type of LAN board this unit is */ UINT32 pciBus; /* PCI Bus number */ UINT32 pciDevice; /* PCI Device number */ UINT32 pciFunc; /* PCI Function number */ UINT16 eeprom[0x40]; /* Ethernet Address of this unit */ INT32 timeout; /* timeout for the self-test */ INT32 str[6]; /* storage for the self-test result */ INT32 *pResults; /* pointer to the self-test result */ UINT memLength; /* required memory size */ UINT initialStateMask; /* mask parameter to vmStateSet */ UINT initialState; /* state parameter to vmStateSet */ } FEI_RESOURCE;/* locals */LOCAL UINT32 feiUnits; /* number of FEIs we found */LOCAL FEI_RESOURCE feiResources [FEI_MAX_UNITS] = { {FEI0_MEMBASE0, FEI0_IOBASE0, FEI0_MEMBASE1, FEI0_INT_LVL, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI0_MEMSIZE0, FEI0_INIT_STATE_MASK, FEI0_INIT_STATE}, {FEI1_MEMBASE0, FEI1_IOBASE0, FEI1_MEMBASE1, FEI1_INT_LVL, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI1_MEMSIZE0, FEI1_INIT_STATE_MASK, FEI1_INIT_STATE}, {FEI2_MEMBASE0, FEI2_IOBASE0, FEI2_MEMBASE1, FEI2_INT_LVL, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI2_MEMSIZE0, FEI2_INIT_STATE_MASK, FEI2_INIT_STATE}, {FEI3_MEMBASE0, FEI3_IOBASE0, FEI3_MEMBASE1, FEI3_INT_LVL, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI3_MEMSIZE0, FEI3_INIT_STATE_MASK, FEI3_INIT_STATE}, };LOCAL const char *phys[] = { "None", "i82553-A/B", "i82553-C", "i82503", "DP83840", "80c240", "80c24", "unknown" };enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240, S80C24, UndefinedPhy };LOCAL const char *connectors[] = {" RJ45", " BNC", " AUI", " MII"};/* forward declarations */LOCAL UINT16 sys557eepromRead (int unit, int location);LOCAL UINT32 sys557mdioRead (int unit, int phyId, int location);LOCAL UINT32 sys557mdioWrite (int unit, int phyId, int location, int value);LOCAL int sys557IntEnable (int unit);LOCAL int sys557IntDisable (int unit);LOCAL int sys557IntAck (int unit);/********************************************************************************* sys557PciInit - prepare LAN adapter for 82557 initialization** This routine find out the PCI device, and map its memory and IO address.* It must be done prior to initializing the 82557, sys557Init(). Also* must be done prior to MMU initialization, usrMmuInit().** RETURNS: N/A*/void sys557PciInit (void) { FEI_RESOURCE *pReso; int pciBus; int pciDevice; int pciFunc; int unit; BOOL duplicate; UINT32 membaseCsr; UINT32 iobaseCsr; UINT32 membaseFlash; char irq; int ix; for (unit = 0; unit < FEI_MAX_UNITS; unit++) { if (pciFindDevice (PRO100B_PCI_VENDOR_ID, PRO100B_PCI_DEVICE_ID, unit, &pciBus, &pciDevice, &pciFunc) != OK) break; /* check the duplicate */ pReso = &feiResources [0]; duplicate = FALSE; for (ix = 0; ix < FEI_MAX_UNITS; ix++, pReso++) { if ((ix != unit) && (pReso->pciBus == pciBus) && (pReso->pciDevice == pciDevice) && (pReso->pciFunc == pciFunc)) duplicate = TRUE; } if (duplicate) continue; /* we found the right one */ pReso = &feiResources [unit]; pReso->pciBus = pciBus; pReso->pciDevice = pciDevice; pReso->pciFunc = pciFunc; if (PCI_CFG_TYPE == PCI_CFG_FORCE) { pciConfigOutLong (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_BASE_ADDRESS_0, pReso->membaseCsr); pciConfigOutLong (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_BASE_ADDRESS_1, pReso->iobaseCsr | PCI_BASE_IO); pciConfigOutLong (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_BASE_ADDRESS_2, pReso->membaseFlash); pciConfigOutByte (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_DEV_INT_LINE, pReso->irq); } /* get memory base address and IO base address */ pciConfigInLong (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_BASE_ADDRESS_0, &membaseCsr); pciConfigInLong (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_BASE_ADDRESS_1, &iobaseCsr); pciConfigInLong (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_BASE_ADDRESS_2, &membaseFlash); pciConfigInByte (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_DEV_INT_LINE, &irq); membaseCsr &= PCI_MEMBASE_MASK; iobaseCsr &= PCI_IOBASE_MASK; membaseFlash &= PCI_MEMBASE_MASK; /* add the entry to sysPhysMemDesc[] */ if (sysMmuMapAdd((void *)membaseCsr, pReso->memLength, pReso->initialStateMask, pReso->initialState) == ERROR) break; /* over write the resource table with read value */ pReso->membaseCsr = membaseCsr; pReso->iobaseCsr = iobaseCsr; pReso->membaseFlash = membaseFlash; pReso->irq = irq; /* enable mapped memory and IO addresses */ pciConfigOutWord (pReso->pciBus, pReso->pciDevice, pReso->pciFunc, PCI_CFG_COMMAND, PCI_CMD_IO_ENABLE | PCI_CMD_MEM_ENABLE | PCI_CMD_MASTER_ENABLE); feiUnits++; } /* specify the interrupt connect/disconnect routines to be used */ #ifdef INCLUDE_FEI /* Intel 82557 (Fast EI) Support */ feiIntConnect = (FUNCPTR) pciIntConnect;#endif /* INCLUDE_FEI */#ifdef INCLUDE_FEI_END /* END-style Intel 82557 (Fast EI) Support */ feiEndIntConnect = (FUNCPTR) pciIntConnect; feiEndIntDisconnect = (FUNCPTR) pciIntDisconnect;#endif /* INCLUDE_FEI_END */ }/********************************************************************************* sys557Init - prepare LAN adapter for 82557 initialization** This routine is expected to perform any adapter-specific or target-specific* initialization that must be done prior to initializing the 82557.** The 82557 driver calls this routine from the driver attach routine before* any other routines in this library.** This routine returns the interrupt level the <pIntLvl> parameter.** RETURNS: OK or ERROR if the adapter could not be prepared for initialization.*/STATUS sys557Init ( int unit, /* unit number */#ifdef INCLUDE_FEI_END /* END-style Intel 82557 (Fast EI) Support */ FEI_BOARD_INFO *pBoard /* board information for the end driver */#else BOARD_INFO *pBoard /* board information for the if_fei driver */#endif /* INCLUDE_FEI_END */ ) { FEI_RESOURCE *pReso = &feiResources [unit]; UINT16 sum = 0; int ix; int iy; UINT16 value; if (unit >= feiUnits) return (ERROR); /* locate the 82557 based adapter. PRO100B and XXX */ if (pReso->boardType == TYPE_PRO100B_PCI) /* only setup once */ { } else { /* read the configuration in EEPROM */ for (ix = 0; ix < EE_SIZE; ix++) { value = sys557eepromRead (unit, ix); pReso->eeprom[ix] = value; sum += value; } if (sum != EE_CHECKSUM) printf ("i82557(%d): Invalid EEPROM checksum %#4.4x\n", unit, sum); /* DP83840 specific setup */ if (((pReso->eeprom[6]>>8) & 0x3f) == DP83840) { int reg23 = sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 23); sys557mdioWrite (unit, pReso->eeprom[6] & 0x1f, 23, reg23 | 0x0420); } /* perform a system self-test. */ pReso->timeout = 16000; /* Timeout for set-test. */ pReso->pResults = (int *) ((((int) pReso->str) + 0xf) & ~0xf); pReso->pResults[0] = 0; pReso->pResults[1] = -1; sysOutLong (pReso->iobaseCsr + SCB_PORT, (int)pReso->pResults | 1); do { sysDelay (); /* delay for one IO READ cycle */ } while ((pReso->pResults[1] == -1) && (--pReso->timeout >= 0)); pReso->boardType = TYPE_PRO100B_PCI; } /* initializes the board information structure */ pBoard->vector = pReso->irq + INT_NUM_IRQ0; pBoard->baseAddr = pReso->membaseCsr; for (ix = 0, iy = 0; ix < 3; ix++) { pBoard->enetAddr[iy++] = pReso->eeprom[ix] & 0xff; pBoard->enetAddr[iy++] = (pReso->eeprom[ix] >> 8) & 0xff; } pBoard->intEnable = sys557IntEnable; pBoard->intDisable = sys557IntDisable; pBoard->intAck = sys557IntAck; pBoard->sysLocalToBus = NULL; pBoard->sysBusToLocal = NULL; #ifdef FEI_10MB pBoard->phySpeed = NULL; pBoard->phyDpx = NULL;#endif sysIntEnablePIC (pReso->irq); return (OK); }/********************************************************************************* sys557IntAck - acknowledge an 82557 interrupt
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