target.nr

鼎鼎大名的WRS提供的VxWorks下pcPentium BSP开发包

        {
            {
                 5, 0,
                 {ATA1_IO_START0, ATA1_IO_START1}, 
                 {ATA1_IO_STOP0, ATA1_IO_STOP1}, 0,
                 0, 0, 0, 0, 0
            },
            IDE_LOCAL, ATA1_NUM_DRIVES, ATA1_INT_VEC, 
            ATA1_INT_LVL, ATA1_CONFIG, ATA_SEM_TIMEOUT, 
            ATA_WDG_TIMEOUT, 0, 0
        }
    };
.CE
where:
.CS
#define ATA0_NUM_DRIVES 2
#define ATA1_NUM_DRIVES 2
#define ATA0_INT_LVL 0x0e
#define ATA1_INT_LVL 0x0f
.CE
A boot EPROM (type 27020 or 27040) is supported 
with Blunk Microsystems' ROM Card 1.0. 
For information on booting from these devices, 
see the Blunk Microsystems documentation.
The program romcard.s, a loader for code programmed in to the EPROM,
is provided to support 
VxWorks with the ROM Card.
In addition, the following configurations are defined in 
the makefile to generate Motorola S-record format from 
bootrom_uncmp or from vxWorks_boot.st :
.TS
center;
l l.
romcard_bootrom_512.hex	boot	ROM image for 27040 (512 KB)
romcard_bootrom_256.hex	boot	ROM image for 27020 (256 KB)
romcard_vxWorks_st_512.hex	bootable VxWorks image for 27040 (512 KB)
.TE
Neither the ROM Card nor the EPROM is distributed with VxWorks.
For more information visit http://www.blunkmicro.com/

.SS "Boot Methods"
The boot methods are affected by the boot parameters.  If no password is
specified, RSH (remote shell) protocol is used.  If a password is specified,
FTP protocol is used, or, if the flag is set, TFTP protocol is used.

These protocols apply only to Ethernet devices

.SS "ROM Considerations"
Not applicable to this BSP

.SH "SPECIAL CONSIDERATIONS"
.SS "Delivered Objects"
.ne 20
.TS
center;
c c
l l.
Object Name	Description
_
vxWorks	T{
image with no target shell or target symbol table. Network is included
and initialized.
T}
VxWorks.st	T{
fully linked stand alone image including
a target based shell, symbol table, and network 
interface. Note that the network interface is not initialized.
There is no WDB agent.
T}
bootrom_uncmp	T{
bootrom with uncompressed image which will run in lower memory
T}
mkboot.o	vxWorks utility for creating boot disks
.TE

.SS "Make Targets"
The BSP supports the following make targets:

.TS E
expand;
cw(1i) cw(2i) c
lw(1i) lw(2i) l.
Image Name	Description	Comments
=
vxWorks_rom	T{
high memory uncompressed bootable vxWorks
T}
vxWorks_rom_low	T{
low memory uncompressed bootable vxWorks
T}	T{
feiattach may not obtain enough memory
T}
vxWorks.st_rom	T{
high memory compressed bootable vxWorks.st
T}
bootrom	T{
low memory compressed bootrom
T}
bootrom_uncmp	T{
low memory uncompressed bootrom
T}
bootrom_high	T{
high memory compressed bootrom
T}	T{
May fail to boot; psychadelic video suggest video memory
or controller corrupted
T}
vxWorks	standard "Tornado-style" vxworks
vxWorks.st	T{
Fully linked stand alone vxWorks
including target based shell, symbol table, and network 
interface. The network interface is not initialized.
There is no WDB agent.
T}
vxWorks.res_rom	T{
Standalone VxWorks image that can be put in ROM.
Only the data segment of this ROM image is copied into RAM.
T}
vxWorks.res_rom_nosym	T{
Standalone VxWorks image that can be put in ROM.
Only the data segment of this ROM image is copied into RAM.
There is no symbol table. 
T}
_
.TE

.SS "Special Routines"
The following routines are specific to this BSP and are available
to the user. The are written in assembly code in sysALib.s. For 
further details see the man pages:
.TS
expand;
sysInByte() | input one byte from I/O space
sysInWord() | input one word from I/O space
sysInLong() | input one long-word from I/O space
sysOutByte() | output one byte to I/O space
sysOutWord() | output one word to I/O space
sysOutLong() | output one long-word to I/O space
sysInWordString() | input word string from I/O space
sysInLongString() | input long string from I/O space
sysOutWordString() | output word string to I/O space
sysOutLongString() | output long string to I/O space
.TE

.SS "Known Problems"
bootrom_high (high memory compressed bootrom) 
may fail to boot; psychadelic video suggest video memory
or controller corrupted

vxWorks_rom_low (low memory uncompressed bootable vxWorks)
feiattach may fail: feiattach might not be
able to obtain enough memory

Failures during Validation Test Suite (VTS):

NVRAM test: fails as this BSP has no NVRAM.

Catastrophic error test: fails as the VTS expects
an exception message but this BSP displays none;
however, the BSP correctly recovers
by rebooting the target.

Bootline Test :
Bus error test for local error address fails.
Bus error test for off-board error address fails.
Boot commands test failed as the VTS incorrectly presumes a big
endian architecture.

.SS "Other"
The valid auxiliary clock rates are between 2 ticks per 
second and 2 to the power of 13 ticks per second (2^13 = 8192).

Warm booting (reboot) is dependent upon the following parameters (shown with
default values) in config.h:

.CS
#define SYS_WARM_BIOS       0   /* warm start from BIOS */
#define SYS_WARM_FD         1   /* warm start from FD */
#define SYS_WARM_ATA        2   /* warm start from ATA */
#define SYS_WARM_TFFS       3   /* warm start from DiskOnChip */

#define SYS_WARM_TYPE       SYS_WARM_FD /* warm start device */
#define SYS_WARM_FD_DRIVE   0   /* 0 = drive a:, 1 = b: */
#define SYS_WARM_FD_TYPE    0   /* 0 = 3.5" 2HD, 1 = 5.25" 2HD */
#define SYS_WARM_ATA_CTRL   0   /* controller 0 */
#define SYS_WARM_ATA_DRIVE  0   /* 0 = c:, 1 = d: */
.CE

If SCSI configuration fails, it may be the result of improper SCSI bus 
termination. Check termination carefully on all devices, including
the controller. Note that some devices
have built in termination that is configured via a jumper.

In order to dynamically update the MMU table entries,
prior to MMU initialization,
several dummy entries
have been added to the end of the memory description
table sysPhysMemDesc. This allows PCI device configuration space,
configured by the BIOS, to be properly mapped into the VxWorks memory
map. This is done by sysMmuMapAdd() in sysLib.c.

This BSP does not support ISA PnP. Such devices can be supported if
PnP is disabled and the device parameters (IO address, Memory address,
IRQ, DMA channel etc) is set to match its BSP driver configuration. If
the device uses soft-configuration instead of jumpers, an appropriate
utility program, usually available from the device manufacturer,
should be used to setup the device parameters.

.SS "Pentium and PentiumPro support"
Following features are supported for Pentium and PentiumPro, and they
are enabled in sysHwInit().  See pentiumLib for more details of these
features.

.IP "Memory Type Range Registers (MTRRs)" 
If INCLUDE_MTRR_GET is defined, contents of the MTRRS are copied to the 
sysMtrr[] table.  Otherwise it sets the contents of sysMtrr[] to the MTRRs.

.IP "Performance Monitoring Counter (PMC)"
This is an optional feature configured by INCLUDE_PMC macro.

.IP "Machine Check Architecture (MCA)"

.IP "Time Stamp Counter (TSC)"
If INCLUDE_TIMESTAMP_TSC is defined, on-chip TSC is used for the 
time stamp driver.  PENTIUM_TSC_FREQ specifies its frequency.
If it is difined to zero, the frequency is automatically detected.

.IP "Enhanced MMU"
The enhanced MMU is included by defining INCLUDE_MMU_PENTIUMPRO macro.
4KB-page and 4MB-page are supported and configurable by VM_PAGE_SIZE
macro.  Two new memory attribute macros, VM_STATE_WBACK and 
VM_STATE_GLOBAL, are added.  
VM_STATE_WBACK (clear PWT bit) and VM_STATE_WBACK_NOT (set PWT bit)
represents the cache mode of a page.
VM_STATE_GLOBAL (set GLOBAL bit) and VM_STATE_GLOBAL_NOT (clear
GLOBAL bit) represents the global characteristics of a page.

.IP "Advanced Programmable Interrupt Controller (APIC)"
PentiumPro's APIC is supported in either Virtual Wire Mode (define
VIRTUAL_WIRE_MODE in config.h) or Symmetric IO Mode (define 
SYMMETRIC_IO_MODE in config.h).  If neither of them is defined,
VxWorks uses a mode that is set up by BIOS, which could be Virtual
Wire Mode or PIC Mode.  Only Local APIC is used in Virtual Wire Mode,
both Local APIC and IO APIC are used in Symmetric IO Mode.

.IP "Data Cache Mode"
CACHE_COPYBACK data cache mode is default for Pentium. 
It uses Write Back data cache mode with the generic MMU library
for X86 architecture.
CACHE_COPYBACK and CACHE_SNOOP_ENABLE is deafult for PentiumPro.
CACHE_COPYBACK has no effect to the PentiumPro's MMU library
that support page basis Write Back/Write Through cache mode.
CACHE_SNOOP_ENABLE respects MESI cache protocol and doesn't invoke
the WBINVD (write back and invalidate cache) instruction in the
flush routine in the cache library.

.SS "MTRR"
This table shows effective memory type depending on MTRR, PCD, and
PWT setting.

.TS E
expand;
c c c c
c c c c
l l l l.
MTRR mem type	PCD value	PWT value	Effective mem type
_
UC	X	X	UC
WC	0	0	WC
	0	1	WC
	1	0	WC
	1	1	UC
WT	0	X	WT
	1	X	UC
WP	0	0	WP
	0	1	WP
	1	0	UC
	1	1	UC
WB	0	0	WB
	0	1	WT
	1	X	UC
_
.TE

This table shows MTRR memory types and their properties.

.TS E
expand;
c c c c c
c c c c c
l l l l l.
	Cacheable in		Allows	Memory
	L1 and L2	Writeback	Speculative	Ordering
Mnemonic	Caches	Cacheable	Reads	Model
_
UC	No	No	No	Strong Ordering
WC	No	No	Yes	Weak Ordering
WT	Yes	No	Yes	Speculative
				Processor Ordering
WP	Yes for reads,	No	Yes	Speculative
	No for writes			Processor Ordering
WB	Yes	Yes	Yes	Speculative
				Processor Ordering
_
.TE

.SH "AUTHOR"
Original port by Hdei Nunoe of Wind River Systems, Alameda, CA.

.SH SEE ALSO
.tG "Getting Started,"
.pG "Configuration"
.pG "Architecture Appendix"

.SH "BIBLIOGRAPHY"
Refer to the vendor's documentation for the motherboard and
any adaptor cards installed.