target.nr

鼎鼎大名的WRS提供的VxWorks下pcPentium BSP开发包

The default Interupt Request (IRQ) Channel number used by x86 BSP for
the SCSI interrupt is 0x0a. This may conflict with other interrupts in
the system (Eg. Ethernet). The user can change the macro SCSI_INT_LVL
in file "pc.h" to reflect an interrupt level number that does not conflict 
with the rest of the system interupts. For setting the IRQ number for
the SCSI Host  Adapter the user is recommended to enter the CMOS setup menu.

If SCSI configuration fails, it can be the result of improper SCSI bus 
termination. Check your hardware setup.

For information regarding installing the AHA-2940
see the "Adaptec 7800 Family Manager Set User's Guide".
.IP "i8253Timer"
This library contains routines to manipulate the timer functions on the
Intel 8253 chip with a board-independent interface.  This library handles
both the system clock and the auxiliary clock functions.
.IP
The macros SYS_CLK_RATE_MIN, SYS_CLK_RATE_MAX, AUX_CLK_RATE_MIN, and
AUX_CLK_RATE_MAX must be defined to provide parameter checking for the
sys[Aux]ClkRateSet() routines.
.IP
The macro PIT_CLOCK must also be defined to indicate the clock frequency
of the i8253.
.IP
The system clock is the programmable interrupt timer.
The auxiliary clock is the real time clock.
.IP
This driver includes a timestamp driver; to use this
feature, the macro INCLUDE_TIMESTAMP must be defined in config.h.
.IP "loApicTimer"
This library contains routines to manipulate the timer functions on the
Intel PentiumPro's Local APIC Timer with a board-independent interface.
This library handles both the system clock and the auxiliary clock 
functions.  The auxiliary clock is either the RTC (real time clock) or
PIT (programmable interrupt timer) channel 0 (define PIT0_FOR_AUX in 
config.h).
.IP
The macros SYS_CLK_RATE_MIN, SYS_CLK_RATE_MAX, AUX_CLK_RATE_MIN, and
AUX_CLK_RATE_MAX must be defined to provide parameter checking for the
sys[Aux]ClkRateSet() routines.
.IP
The macro TIMER_CLOCK_HZ must also be defined to indicate the clock 
frequency of the Local APIC Timer.
.IP
This driver includes a timestamp driver; to use this
feature, the macro INCLUDE_TIMESTAMP must be defined in config.h.
.IP "i8259Intr"
Driver for the Intel 8259A Programmable Interrupt Controller (PIC).
.IP "loApicIntr"
Driver for the Intel PentiumPro's Local APIC.
This driver is used in either Virtual Wire Mode (define VIRTUAL_WIRE_MODE
in config.h) or Symmetric IO Mode (define SYMMETRIC_IO_MODE in config.h).
loApicInit () initializes the Local APIC and scans certain memory
regions as specified in the specification to determine the base
addresses.  It uses LOAPIC_BASE and IOAPIC_BASE defined in the BSP, if
it is not able to find the addresses in the MP configuration table.
Scaned memory regions are defined by two pairs of macro in pc.h,
BIOS_ROM_START and BIOS_ROM_END, EBDA_START and EBDA_END.
.IP "ioApicIntr"
Driver for the Intel IO APIC.
This driver is used in Symmetric IO Mode (define SYMMETRIC_IO_MODE in
config.h).  ioApicInit() initializes the IO APIC with information stored
in redTable[].  redTable[] has three entries - lsw, vectorNo, mask.  
First entry, lsw, stores the least significant word of the IO APIC's 
redirection table.  That includes Trigger Mode, Interrupt Input Pin 
Polarity, Destination Mode, Delivery Mode.  Second entry, vectorNo, is
the vectorNo of the redirection table.  Third entry, mask, should be 0 
and used by ioApicIntLock() and ioApicIntUnlock() to hold the interrupt
mask status.
.IP "nullNvRam"
This library contains dummy non-volatile RAM manipulation routines for targets
lacking non-volatile RAM.  Read and write routines that return ERROR
are included.

The macro NV_RAM_SIZE should be defined as NONE for targets lacking
non-volatile RAM.
.IP "nullVme"
This library contains null routines for boards which do not include any
common bus routines.
.IP "pcmciaLib and pcmciaShow"
Drivers for PCMCIA. In order to use any PCMCIA card 
the INCLUDE_PCMCIA directive
must be enabled in config.h. These drivers currently
support three cards. To use an ATA PC card, enable
INCLUDE_ATA; to use an SRAM PC card, enable INCLUDE_SRAM;
to use a 3COM Etherlink III PC card, enable INCLUDE_ELT.
By default, all three cards are enabled when INCLUDE_PCMCIA is enabled.
.IP "if_ultra"
Driver for the SMC Elite16 (Western Digital 8013WC) 
and SMC Elite 16 Ultra network cards.
To use these controllers the INCLUDE_ULTRA 
directive must be enabled in config.h.  
The following jumper configurations
are supported:

.TS
center;
cf3 s cf3 s
lf3 lf3 lf3 lf3
c c c c
a a4 a a .
SMC Elite 16		SMC Elite16 Ultra
Jumper	Setting	Jumper	Setting
_
W1	SOFT (I/O addr 0x240)	W1	SOFT (I/O addr 0x240)
W2	NONE/SOFT	-	NO ROM
-	NO ROM
_
.TE

IRQ levels 2,3,5,7,10,11,15 are supported.
.IP "if_eex"
Driver for the Intel EtherExpress16 network card.  
To use this board the INCLUDE_EEX 
directive must be enabled in config.h.  
This board is soft-configured with no jumpers.
.IP "if_elt"
Driver for the 3Com EtherLinkIII network card.
To use this board the INCLUDE_ELT
directive must be enabled in config.h.  
This board is 
soft-configured with no jumpers.
PnP must be disabled in the soft configuration for this card
to work with vxWorks.
.IP "if_ene"
Driver for several compatible versions of the 
Novell/Eagle 2000.
To use one of these board the INCLUDE_ENE
directive must be enabled in config.h.  
The I/O base address, 
memory address, and interrupt level must match those in config.h.
.IP "if_esmc"
Driver for the
Ampro Ethernet2(SMC 91c9x chip) network card.
To use this board the INCLUDE_ESMC
directive must be enabled in config.h.  
This board is soft configured.
The I/O base address and interrupt level must match those in config.h.
.IP "if_fei"
Generic driver for the
Intel 82557 Ethernet network interface chip.
An example of a board using this chip is 
the EtherExpress PRO100B. 
To use this driver the INCLUDE_FEI
directive must be enabled in config.h.
If defined FEI_10MB indicates
the unit should operate at ethernet speed of 10 megabits per second.

.SS "Memory Maps"
.TS
center allbox;
c c c
l l l.
Start Address	Size	Use
LOCAL_MEM_LOCAL_ADRS	0xa0000	lower memory
0xa0000	0x60000	video ram, etc
0x100000	LOCAL_MEM_SIZE - 0x100000	upper memory
.TE

.SS "Shared Memory"
Not applicable to this BSP

.SS "Interrupts"
All ISA interrupts are external to the CPU and are routed
through the ISA interrupt prioritization hardware.  This hardware is
comprised of two 82C59 PICs.  There are 16 ISA interrupts and
interrupt priority levels numbered 0 through 15. The mapping between
interrupt numbers and priority levels is not necessarily one to one.
The motherboard hardware determines the mapping of interrupt
request lines (IRQ) to priority levels. The hardware should
adhere to the standard ISA assignments:

.ne 18 
            IRQ         Priority
            ---         --------
             0              0
             1              1
             2              2
             3             11
             4             12
             5             13
             6             14
             7             15
             8              3
             9              4
            10              5
            11              6
            12              7
            13              8
            14              9
            15             10

IRQs 0 - 7 are handled by PIC1 and IRQs 8 - 15 by PIC2.  PIC2 interrupts are
cascaded into PIC1 at IRQ2 which is reflected in the above table.

PentiumPro has new interrupt controller APIC (Advanced Programmable Interrupt
Controller) which consists of Local APIC (on-chip) and IO APIC (on chipset).
They are used in two additional interrupt modes that are configurable in BSP.  

Virtual Wire Mode: One of three interrupt modes defined by the MP
specification.  In this mode, interrupts are generated by the 8259A 
equivalent PICs, but delivered to the BSP by an APIC that is programmed to 
act as a "virtual wire"; that is, the APIC is logically indistinguishable 
from a hardware connection.  This is a uniprocessor compatibility mode.
To use this mode, define VIRTUAL_WIRE_MODE in config.h

Symmetric IO Mode: One of three interrupt modes defined by the MP
specification.  In this mode, the APICs are fully functional, and 
interrupts are generated and delivered to the processors by the APICs.  
Any interrupt can be delivered to any processor.  This is the only 
multiprocessor interrupt mode.
To use this mode, define SYMMETRIC_IO_MODE in config.h

.SS "Serial Configuration"
Refer to the board vendor's documentation.

.SS "SCSI Configuration"
Refer to the board vendor's documentation.

.SS "Network Configuration"
Refer to the board vendor's documentation.

.SS "VME Access"
This BSP has no VME access

.SS "PCI Access"
In order to use PCI the INCLUDE_PCI
directive must be enabled in config.h.
Furthermore, PCI_CFG_TYPE in pc.h
must be set to the correct configuration type.
Values for PCI_CFG_TYPE must be one of:

.TS
center;
c c
l l.
Macro	meaning
_
PCI_CFG_FORCE	force user specified configuration
PCI_CFG_AUTO	VxWorks does auto configuration. Currently unavailable.
PCI_CFG_NONE	external agent does configuration
.TE

PCI defines two mechanisms. The newer method, and the default vxWorks
method, is PCI_MECHANISM_1. Some older PCs might work better with
the old method, PCI_MECHANISM_2. If PCI is not working with
your older PC, change the first argument to pciIomapLibInit
to PCI_MECHANISM_2 in sysLib.c:
.ne 7
.CS
#ifdef  INCLUDE_PCI
    pciIomapLibInit (PCI_MECHANISM_1, PCI_CONFIG_ADDR, PCI_CONFIG_DATA,
NONE);
#if     FALSE
    pciIomapLibInit (PCI_MECHANISM_2, PCI_CONFIG_CSE, PCI_CONFIG_FORWARD,
                     PCI_CONFIG_BASE);
#endif  /* FALSE */
.CE
.ne 22
.SS "Boot Devices"
The supported boot devices are:
	
.CS
    \f3xx\f1 - Ethernet (any one of the many adaptors described above)
.CE
.CS
    \f3pcmcia=<slot number>\f1 - PCMCIA device
        slot number is one of:
            0 = PCMCIA slot 0
            1 = PCMCIA slot 1
	Note: Supported PCMCIA boot cards are the 3COM Etherlink III PC card
	and a PCMCIA ATA card
.CE
.CS
    \f3fd=<drive number>,<diskette type>\f1 - Diskette
        drive number is one of:
            0 = default; the first diskette drive (drive A:)
            1 = the second diskette drive (drive B:)
        diskette type is one of:
            0 = default; 3.5" diskette
            1 = 5.25" diskette
.CE
.CS
    \f3ata=<controller number>,<drive number>\f1 - ATA/IDE drive
        controller number is one of:
            0 = controller described in the first entry of 
                the ataResources table
            1 = controller described in the second entry of 
                the ataResources table
        drive number is one of:
            0 = first drive on the controller
            1 = second drive on the controller
.CE
Note: 
By default, with INCLUDE_ATA, vxWorks is set up for 
one ATA hard disk device on the primary ATA controller.  
The 2nd hard disk on the primary controller and the 
secondary controller are normally disabled to prevent timeouts.
If you have multiple controllers and/or hard disks
you must modify the ataResources structure array in sysLib.c to support 
more drives.

.ne 34
Example:
Two controllers, each with two drives (4 drives total):
.CS
ATA_RESOURCE ataResources[ATA_MAX_CTRLS] =
    {
        {
            {
                5, 0,
                {ATA0_IO_START0, ATA0_IO_START1}, 
                {ATA0_IO_STOP0, ATA0_IO_STOP1}, 0,
                0, 0, 0, 0, 0
            },
            IDE_LOCAL, ATA0_NUM_DRIVES, ATA0_INT_VEC, 
            ATA0_INT_LVL, ATA0_CONFIG, ATA_SEM_TIMEOUT, 
            ATA_WDG_TIMEOUT, 0, 0
        },