📄 iocan128v.h
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#ifndef __ioCAN128v_h
#define __ioCAN128v_h
/* AT90CAN128 header file for
* ImageCraft ICCAVR compiler
*/
/* memory mapped io at 0x60..0xFF
*/
/* lock and fuse bits definitions
*/
/* interrupt vector number definitions
*/
/* last changed (creation) 26 MAr 2004 - JT
*/
/* Port A */
#define PINA (*(volatile unsigned char *)0x20)
#define PINA7 7
#define PINA6 6
#define PINA5 5
#define PINA4 4
#define PINA3 3
#define PINA2 2
#define PINA1 1
#define PINA0 0
#define DDRA (*(volatile unsigned char *)0x21)
#define DDA7 7
#define DDA6 6
#define DDA5 5
#define DDA4 4
#define DDA3 3
#define DDA2 2
#define DDA1 1
#define DDA0 0
#define PORTA (*(volatile unsigned char *)0x22)
#define PORTA7 7
#define PORTA6 6
#define PORTA5 5
#define PORTA4 4
#define PORTA3 3
#define PORTA2 2
#define PORTA1 1
#define PORTA0 0
#define PA7 7
#define PA6 6
#define PA5 5
#define PA4 4
#define PA3 3
#define PA2 2
#define PA1 1
#define PA0 0
/* Port B */
#define PINB (*(volatile unsigned char *)0x23)
#define PINB7 7
#define PINB6 6
#define PINB5 5
#define PINB4 4
#define PINB3 3
#define PINB2 2
#define PINB1 1
#define PINB0 0
#define DDRB (*(volatile unsigned char *)0x24)
#define DDB7 7
#define DDB6 6
#define DDB5 5
#define DDB4 4
#define DDB3 3
#define DDB2 2
#define DDB1 1
#define DDB0 0
#define PORTB (*(volatile unsigned char *)0x25)
#define PORTB7 7
#define PORTB6 6
#define PORTB5 5
#define PORTB4 4
#define PORTB3 3
#define PORTB2 2
#define PORTB1 1
#define PORTB0 0
#define PB7 7
#define PB6 6
#define PB5 5
#define PB4 4
#define PB3 3
#define PB2 2
#define PB1 1
#define PB0 0
/* Port C */
#define PINC (*(volatile unsigned char *)0x26)
#define PINC7 7
#define PINC6 6
#define PINC5 5
#define PINC4 4
#define PINC3 3
#define PINC2 2
#define PINC1 1
#define PINC0 0
#define DDRC (*(volatile unsigned char *)0x27)
#define DDC7 7
#define DDC6 6
#define DDC5 5
#define DDC4 4
#define DDC3 3
#define DDC2 2
#define DDC1 1
#define DDC0 0
#define PORTC (*(volatile unsigned char *)0x28)
#define PORTC7 7
#define PORTC6 6
#define PORTC5 5
#define PORTC4 4
#define PORTC3 3
#define PORTC2 2
#define PORTC1 1
#define PORTC0 0
#define PC7 7
#define PC6 6
#define PC5 5
#define PC4 4
#define PC3 3
#define PC2 2
#define PC1 1
#define PC0 0
/* Port D */
#define PIND (*(volatile unsigned char *)0x29)
#define PIND7 7
#define PIND6 6
#define PIND5 5
#define PIND4 4
#define PIND3 3
#define PIND2 2
#define PIND1 1
#define PIND0 0
#define DDRD (*(volatile unsigned char *)0x2a)
#define DDD7 7
#define DDD6 6
#define DDD5 5
#define DDD4 4
#define DDD3 3
#define DDD2 2
#define DDD1 1
#define DDD0 0
#define PORTD (*(volatile unsigned char *)0x2b)
#define PORTD7 7
#define PORTD6 6
#define PORTD5 5
#define PORTD4 4
#define PORTD3 3
#define PORTD2 2
#define PORTD1 1
#define PORTD0 0
#define PD7 7
#define PD6 6
#define PD5 5
#define PD4 4
#define PD3 3
#define PD2 2
#define PD1 1
#define PD0 0
/* Port E */
#define PINE (*(volatile unsigned char *)0x2c)
#define PINE7 7
#define PINE6 6
#define PINE5 5
#define PINE4 4
#define PINE3 3
#define PINE2 2
#define PINE1 1
#define PINE0 0
#define DDRE (*(volatile unsigned char *)0x2d)
#define DDE7 7
#define DDE6 6
#define DDE5 5
#define DDE4 4
#define DDE3 3
#define DDE2 2
#define DDE1 1
#define DDE0 0
#define PORTE (*(volatile unsigned char *)0x2e)
#define PORTE7 7
#define PORTE6 6
#define PORTE5 5
#define PORTE4 4
#define PORTE3 3
#define PORTE2 2
#define PORTE1 1
#define PORTE0 0
#define PE7 7
#define PE6 6
#define PE5 5
#define PE4 4
#define PE3 3
#define PE2 2
#define PE1 1
#define PE0 0
/* Port F */
#define PINF (*(volatile unsigned char *)0x2f)
#define PINF7 7
#define PINF6 6
#define PINF5 5
#define PINF4 4
#define PINF3 3
#define PINF2 2
#define PINF1 1
#define PINF0 0
#define DDRF (*(volatile unsigned char *)0x30)
#define DDF7 7
#define DDF6 6
#define DDF5 5
#define DDF4 4
#define DDF3 3
#define DDF2 2
#define DDF1 1
#define DDF0 0
#define PORTF (*(volatile unsigned char *)0x31)
#define PORTF7 7
#define PORTF6 6
#define PORTF5 5
#define PORTF4 4
#define PORTF3 3
#define PORTF2 2
#define PORTF1 1
#define PORTF0 0
#define PF7 7
#define PF6 6
#define PF5 5
#define PF4 4
#define PF3 3
#define PF2 2
#define PF1 1
#define PF0 0
/* Port G */
#define PING (*(volatile unsigned char *)0x32)
#define PING4 4
#define PING3 3
#define PING2 2
#define PING1 1
#define PING0 0
#define DDRG (*(volatile unsigned char *)0x33)
#define DDG4 4
#define DDG3 3
#define DDG2 2
#define DDG1 1
#define DDG0 0
#define PORTG (*(volatile unsigned char *)0x34)
#define PORTG4 4
#define PORTG3 3
#define PORTG2 2
#define PORTG1 1
#define PORTG0 0
#define PG4 4
#define PG3 3
#define PG2 2
#define PG1 1
#define PG0 0
/* Timer/Counter Interrupts */
#define TIFR0 (*(volatile unsigned char *)0x35)
#define OCF0A 1
#define OCF0 1
#define TOV0 0
#define TIFR1 (*(volatile unsigned char *)0x36)
#define ICF1 5
#define OCF1C 3
#define OCF1B 2
#define OCF1A 1
#define TOV1 0
#define TIFR2 (*(volatile unsigned char *)0x37)
#define OCF2A 1
#define OCF2 1
#define TOV2 0
#define TIFR3 (*(volatile unsigned char *)0x38)
#define ICF3 5
#define OCF3C 3
#define OCF3B 2
#define OCF3A 1
#define TOV3 0
/* External Interrupt Flags and Masks */
#define EIFR (*(volatile unsigned char *)0x3c)
#define INTF7 7
#define INTF6 6
#define INTF5 5
#define INTF4 4
#define INTF3 3
#define INTF2 2
#define INTF1 1
#define INTF0 0
#define EIMSK (*(volatile unsigned char *)0x3d)
#define INT7 7
#define INT6 6
#define INT5 5
#define INT4 4
#define INT3 3
#define INT2 2
#define INT1 1
#define INT0 0
/* GPIO Registers */
#define GPIOR0 (*(volatile unsigned char *)0x3e)
#define GPIOR1 (*(volatile unsigned char *)0x4a)
#define GPIOR2 (*(volatile unsigned char *)0x4b)
/* EEPROM */
#define EECR (*(volatile unsigned char *)0x3f)
#define EERIE 3
#define EEMWE 2
#define EEWE 1
#define EERE 0
#define EEDR (*(volatile unsigned char *)0x40)
#define EEAR (*(volatile unsigned int *)0x41)
#define EEARL (*(volatile unsigned char *)0x41)
#define EEARH (*(volatile unsigned char *)0x42)
/* General Timer Control */
#define GTCCR (*(volatile unsigned char *)0x43)
#define TSM 7
#define PSR2 1
#define PSR310 0
/* to enable multi-part lib writing */
#define PSR3 PSR310
#define PSR1 PSR310
#define PSR0 PSR310
/* Timer/Counter 0 */
#define TCCR0A (*(volatile unsigned char *)0x44)
#define TCCR0 (*(volatile unsigned char *)0x44)
#define FOC0 7
#define FOC0A 7
#define WGM00 6
#define COM01 5
#define COM00 4
#define COM0A1 5
#define COM0A0 4
#define WGM01 3
#define CS02 2
#define CS01 1
#define CS00 0
#define TCNT0 (*(volatile unsigned char *)0x46)
#define OCR0 (*(volatile unsigned char *)0x47)
/* SPI */
#define SPCR (*(volatile unsigned char *)0x4c)
#define SPIE 7
#define SPE 6
#define DORD 5
#define MSTR 4
#define CPOL 3
#define CPHA 2
#define SPR1 1
#define SPR0 0
#define SPSR (*(volatile unsigned char *)0x4d)
#define SPIF 7
#define WCOL 6
#define SPI2X 0
#define SPDR (*(volatile unsigned char *)0x4e)
/* Analog Comparator */
#define ACSR (*(volatile unsigned char *)0x50)
#define ACD 7
#define ACBG 6
#define ACO 5
#define ACI 4
#define ACIE 3
#define ACIC 2
#define ACIS1 1
#define ACIS0 0
/* OCDR */
#define OCDR (*(volatile unsigned char *)0x51)
#define IDRD 7
#define OCD7 7
#define OCD6 6
#define OCD5 5
#define OCD4 4
#define OCD3 3
#define OCD2 2
#define OCD1 1
#define OCD0 0
/* MCU general */
#define SMCR (*(volatile unsigned char *)0x53)
#define SM2 3
#define SM1 2
#define SM0 1
#define SE 0
#define MCUSR (*(volatile unsigned char *)0x54)
#define JTRF 4
#define WDRF 3
#define BORF 2
#define EXTRF 1
#define PORF 0
#define MCUCR (*(volatile unsigned char *)0x55)
#define JTD 7
#define PUD 4
#define IVSEL 1
#define IVCE 0
/* SPM Conrol Register */
#define SPMCSR (*(volatile unsigned char *)0x57)
#define SPMIE 7
#define RWWSB 6
#define RWWSRE 4
#define BLBSET 3
#define PGWRT 2
#define PGERS 1
#define SPMEN 0
/* ProgRAm Memory msb address Z-Pointer */
#define RAMPZ (*(volatile unsigned char *)0x5B)
/* Stack Pointer */
#define SP (*(volatile unsigned int *)0x5D)
#define SPL (*(volatile unsigned char *)0x5D)
#define SPH (*(volatile unsigned char *)0x5E)
/* Status REGister */
#define SREG (*(volatile unsigned char *)0x5F)
/*--------------------------------------*/
/* rest is memory mapped */
/*--------------------------------------*/
/* Watchdog Timer Control Register */
#define WDTCR (*(volatile unsigned char *)0x60)
#define WDTOE 4
#define WDCE 4
#define WDE 3
#define WDP2 2
#define WDP1 1
#define WDP0 0
/* Oscillator */
#define CLKPR (*(volatile unsigned char *)0x61)
#define CLKPCE 7
#define CLKPS3 3
#define CLKPS2 2
#define CLKPS1 1
#define CLKPS0 0
#define OSCCAL (*(volatile unsigned char *)0x66)
/* External Interrupt configuration */
#define EICRA (*(volatile unsigned char *)0x69)
#define ISC31 7
#define ISC30 6
#define ISC21 5
#define ISC20 4
#define ISC11 3
#define ISC10 2
#define ISC01 1
#define ISC00 0
#define EICRB (*(volatile unsigned char *)0x6A)
#define ISC71 7
#define ISC70 6
#define ISC61 5
#define ISC60 4
#define ISC51 3
#define ISC50 2
#define ISC41 1
#define ISC40 0
/* Timer/Counter Interrupts */
#define TIMSK0 (*(volatile unsigned char *)0x6e)
#define OCIE0A 1
#define OCIE0 1
#define TOIE0 0
#define TIMSK1 (*(volatile unsigned char *)0x6f)
#define TICIE1 5
#define ICIE1 5
#define OCIE1C 3
#define OCIE1B 2
#define OCIE1A 1
#define TOIE1 0
#define TIMSK2 (*(volatile unsigned char *)0x70)
#define OCIE2A 1
#define OCIE2 1
#define TOIE2 0
#define TIMSK3 (*(volatile unsigned char *)0x71)
#define TICIE3 5
#define ICIE3 5
#define OCIE3C 3
#define OCIE3B 2
#define OCIE3A 1
#define TOIE3 0
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