iic_test_v0.1.c

Linux下调用2410内的IIC模块完成与X1227时钟芯片的通讯

#include <linux/wait.h> 
#include <linux/unistd.h>  //sleep
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/iobuf.h>
#include <linux/major.h>
#include <linux/blkdev.h>
#include <linux/capability.h>
#include <linux/smp_lock.h>
#include <asm/uaccess.h>
#include <asm/hardware.h>
#include <asm/arch/cpu_s3c2410.h>
#include <asm/io.h>
#include <linux/vmalloc.h>


//<linux/sched.h>:[current] which yields apointer to struct task_struck
//MODULE_LICENSE("Dual BSD/GPL");
//===============================================================================

#define SC_H 0x00
#define SC_L 0x30

//devfs_handle_t devfs_iic;
volatile unsigned long *rGPECON,*rGPEDAT,*rGPEUP;
volatile unsigned char *rIICCON,*rIICSTAT,*rIICDS,*rIICADD;
DECLARE_WAIT_QUEUE_HEAD(wait); 

/*
int iic_open(struct inode *,struct file *);
int iic_release(struct inode *, struct file *);
int iic_ioctl(struct inode *,struct file *,unsigned int,unsigned long);
ssize_t iic_read(struct file *,char *,size_t );
ssize_t iic_write(struct file *,char *,size_t );


static struct file_operations iic_fops={
	open: iic_open,
	read: iic_read,
	write:iic_write,
	ioctl:iic_ioctl,
	release:iic_release,
};
*/

static void send(unsigned char data)
{

	*rIICDS=data;
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	while((*rIICCON & 0x10)==0);   //waiting for ACK
}

void delay(void)
{
	int i,j;
	volatile int a;
	for (i=0;i<60000;i++) 
	{
		for (j=0;j<100;j++) a=0;
	}
}
	



int __init iic_init(void)
{
	int i;
	unsigned char ret[8]={0x46,0x05,0x24,0x16,0x04,0x06,0x00,0x20};
//------------ioremap----------------------
	rGPECON = ioremap(0x56000040,4);
	rGPEDAT = ioremap(0x56000044,4);
	rGPEUP  = ioremap(0x56000048,4);

	rIICCON = ioremap(0x54000000,4);  //control
	rIICSTAT= ioremap(0x54000004,4);  //control/status
	rIICDS  = ioremap(0x5400000c,4);  //Tx/Rx data shift register
	rIICADD = ioremap(0x54000008,4);  //address
	printk("iic:ioremap [ok]\n");
//-----------------------------------------------------
//	*rGPECON |= 0xa0000000;  //configure
//	*rGPECON &= 0xafffffff;  //IICSDA IICSCL
	*rGPECON  = 0xaaaaaaaa;  //IICSDA IICSCL
	*rGPEUP  |= 0x0000c000;  //disable pull-up function

	*rIICSTAT  =0x10;
	*rIICCON  |=0xef;
    printk("iic:configure [ok]\n");
//-------^Master Tx mode has been configured^--------

//-------write-------
	*rIICDS=0xde;  //X1227 CCR (W)  write_to_WEL
	*rIICSTAT =0xf0; //IICSTAT:Master transmit mode / START signal / Serial output Enable
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	send(0x00); //Status H
	send(0x3f); //Status L
	send(0x02); //DATA
	*rIICSTAT =0xd0; //STOP
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	delay();
    printk("iic:write 02  [ok]\n");

	*rIICDS=0xde;  //X1227 CCR (W)  write_to_RWEL
	*rIICSTAT =0xf0; //IICSTAT:Master transmit mode / START signal / Serial output Enable
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	send(0x00); //Status H
	send(0x3f); //Status L
	send(0x06); //DATA
	*rIICSTAT =0xd0; //STOP
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	delay();
    printk("iic:write 06  [ok]\n");



	*rIICDS=0xde;  //X1227 CCR (W)  write_to_DATA
	*rIICSTAT =0xf0; //IICSTAT:Master transmit mode / START signal / Serial output Enable
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	send(SC_H); //SC_H
	send(SC_L); //SC_L

	for (i=0;i<8;i++)
	{
		send(ret[i]);
	}

	*rIICSTAT =0xd0; //STOP
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	delay();
	
//-------------------
	sleep_on_timeout(&wait, HZ); /* 1s */ 
    printk("iic:delay  [ok]\n");
//--------read---------
	*rIICDS=0xde;  //X1227 CCR (W)  write_to_DATA
	*rIICSTAT =0xf0; //IICSTAT:Master transmit mode / START signal / Serial output Enable
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	send(SC_H); //SC_H
	send(SC_L); //SC_L
	*rIICDS   =0xdf;
	*rIICSTAT =0xb0;
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	printk("%x\n",(unsigned char)(*rIICDS));   //invalid data (first byte)
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	while((*rIICCON & 0x10)==0);   //waiting for ACK

	for (i=0;i<7;i++)
	{
		printk("0x003%d: %x\n",i,(unsigned char)(*rIICDS));
		*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
		while((*rIICCON & 0x10)==0);   //waiting for ACK
	}



//-------read_last_data-------
	*rIICCON &=0x7f; //without ACK (receive)
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	printk("%x\n",(unsigned char)(*rIICDS));
	*rIICSTAT=0x90;
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	
//	*rIICSTAT &=0xdf; //STOP  //ready_for_read
//    printk("iic:ready_for_read  [ok]\n");
//    send(0xdf); //X1227 CCR (R)


//	send(0xdf);
/*
	*rIICCON &=0x7f;
	*rIICSTAT|=0xb0; //IICSTAT:Master transmit mode / START signal / Serial output Enable
	while((*rIICCON & 0x10)==0);   //waiting for ACK
	printk("%x\n",(unsigned char)(*rIICDS));
	*rIICCON &=0xef; //resume IIC operation: IICCON[4](Interrupt_Pending) cleared
	*rIICSTAT=0x90;
    printk("iic:READ SC  [ok]\n");
*/
	printk("<1>iic_init\n");
	return 0;
}

static void __exit iic_exit(void)
{
//	devfs_unregister(devfs_iic);	
	printk("<1>iic_exit\n");
}



module_init(iic_init);
module_exit(iic_exit);