readme

系统启动时检测内存状况的软件C代码

9) Execution Time
==================
The time required for a complete pass of Memtest86 will vary greatly
depending on CPU speed, memory speed and memory size. Memtest86 executes 
indefinitely.  The pass counter increments each time that all of the 
selected tests have been run.  Generally a single pass is sufficient to 
catch all but the most obscure errors. However, for complete confidence 
when intermittent errors are suspected testing for a longer period is advised.

10) Memory Testing Philosophy
=============================
There are many good approaches for testing memory.  However, many tests
simply throw some patterns at memory without much thought or knowledge
of memory architecture or how errors can best be detected. This
works fine for hard memory failures but does little to find intermittent
errors. BIOS based memory tests are useless for finding intermittent
memory errors.

Memory chips consist of a large array of tightly packed memory cells,
one for each bit of data.  The vast majority of the intermittent failures
are a result of interaction between these memory cells.  Often writing a
memory cell can cause one of the adjacent cells to be written with the
same data. An effective memory test attempts to test for this
condition. Therefore, an ideal strategy for testing memory would be
the following:

  1) write a cell with a zero
  2) write all of the adjacent cells with a one, one or more times
  3) check that the first cell still has a zero

It should be obvious that this strategy requires an exact knowledge
of how the memory cells are laid out on the chip.  In addition there is a
never ending number of possible chip layouts for different chip types
and manufacturers making this strategy impractical.  However, there
are testing algorithms that can approximate this ideal strategy. 


11) Memtest86 Test Algorithms
=============================
Memtest86 uses two algorithms that provide a reasonable approximation
of the ideal test strategy above.  The first of these strategies is called
moving inversions.  The moving inversion test works as follows:

  1) Fill memory with a pattern
  2) Starting at the lowest address
	2a check that the pattern has not changed
	2b write the patterns complement
	2c increment the address
	repeat 2a - 2c
  3) Starting at the highest address
	3a check that the pattern has not changed
	3b write the patterns complement
	3c decrement the address
	repeat 3a - 3c

This algorithm is a good approximation of an ideal memory test but
there are some limitations.  Most high density chips today store data
4 to 16 bits wide.  With chips that are more than one bit wide it
is impossible to selectively read or write just one bit.  This means
that we cannot guarantee that all adjacent cells have been tested
for interaction.  In this case the best we can do is to use some
patterns to insure that all adjacent cells have at least been written
with all possible one and zero combinations.

It can also be seen that caching, buffering and out of order execution
will interfere with the moving inversions algorithm and make less effective.
It is possible to turn off cache but the memory buffering in new high
performance chips can not be disabled.  To address this limitation a new
algorithm I call Modulo-X was created.  This algorithm is not affected by
cache or buffering.  The algorithm works as follows:
  1) For starting offsets of 0 - 20 do
	1a write every 20th location with a pattern
	1b write all other locations with the patterns complement
	   repeat 1b one or more times
	1c check every 20th location for the pattern

This algorithm accomplishes nearly the same level of adjacency testing
as moving inversions but is not affected by caching or buffering.  Since
separate write passes (1a, 1b) and the read pass (1c) are done for all of
memory we can be assured that all of the buffers and cache have been
flushed between passes.  The selection of 20 as the stride size was somewhat
arbitrary.  Larger strides may be more effective but would take longer to
execute.  The choice of 20 seemed to be a reasonable compromise between
speed and thoroughness.


12) Individual Test Descriptions
================================
Memtest86 executes a series of numbered test sections to check for
errors.  These test sections consist of a combination of test
algorithm, data pattern and caching. The execution order for these tests
were arranged so that errors will be detected as rapidly as possible.
A description of each of the test sections follows:

Test 0 [Address test, walking ones, no cache]
  Tests all address bits in all memory banks by using a walking ones
  address pattern.  Errors from this test are not used to calculate
  BadRAM patterns.

Test 1 [Address test, own address]
  Each address is written with its own address and then is checked
  for consistency.  In theory previous tests should have caught any
  memory addressing problems.  This test should catch any addressing
  errors that somehow were not previously detected.

Test 2 [Moving inversions, ones&zeros]
  This test uses the moving inversions algorithm with patterns of all
  ones and zeros.  Cache is enabled even though it interferes to some
  degree with the test algorithm.  With cache enabled this test does not
  take long and should quickly find all "hard" errors and some more
  subtle errors.  This section is only a quick check.
 
Test 3 [Moving inversions, 8 bit pat]
  This is the same as test 1 but uses a 8 bit wide pattern of
  "walking" ones and zeros.  This test will better detect subtle errors
  in "wide" memory chips.  A total of 20 data patterns are used.

Test 4 [Moving inversions, random pattern]
  Test 4 uses the same algorithm as test 1 but the data pattern is a
  random number and it's complement. This test is particularly effective
  in finding difficult to detect data sensitive errors. A total of 60
  patterns are used. The random number sequence is different with each pass 
  so multiple passes increase effectiveness. 
  
Test 5 [Block move, 64 moves]
  This test stresses memory by using block move (movsl) instructions
  and is based on Robert Redelmeier's burnBX test.  Memory is initialized
  with shifting patterns that are inverted every 8 bytes.  Then 4MB blocks
  of memory are moved around using the movsl instruction.  After the moves
  are completed the data patterns are checked.  Because the data is checked
  only after the memory moves are completed it is not possible to know
  where the error occurred.  The addresses reported are only for where the
  bad pattern was found.  Since the moves are constrained to a 8MB segment
  of memory the failing address will always be lest than 8MB away from the
  reported address.  Errors from this test are not used to calculate
  BadRAM patterns.

Test 6 [Moving inversions, 32 bit pat]
  This is a variation of the moving inversions algorithm that shifts the data
  pattern left one bit for each successive address. The starting bit position
  is shifted left for each pass. To use all possible data patterns 32 passes
  are required.  This test is quite effective at detecting data sensitive
  errors but the execution time is long.
 
Test 7 [Random number sequence]
 This test writes a series of random numbers into memory. By resetting the
 seed for the random number the same sequence of number can be created for
 a reference. The initial pattern is checked and then complemented and
 checked again on the next pass. However, unlike the moving inversions test
 writing and checking can only be done in the forward direction.

Test 8 [Modulo 20, ones&zeros]
  Using the Modulo-X algorithm should uncover errors that are not
  detected by moving inversions due to cache and buffering interference
  with the the algorithm.  All ones and zeros are used for data patterns.

Test 9 [Bit fade test, 90 min, 2 patterns]
  The bit fade test initializes all of memory with a pattern and then
  sleeps for 90 minutes. Then memory is examined to see if any memory bits
  have changed. All ones and all zero patterns are used. This test takes
  3 hours to complete. The Bit Fade test is not included in the normal test 
  sequence and must be run manually via the runtime configuration menu.


13) Problem Reporting - Contact Information
===========================================
Due to the growing popularity of Memtest86 (more than 200,000 downloads per
month) I have been inundated by, questions, feedback, problem reports and
requests for enhancements. I simply do not have time to repond to ANY Memtest86
emails. Bug reports and suggestions are welcome but will typically not be
responded to.

*** NOTE: *** The Keyword MEM86 must appear in the subject of all emails or
the message will be automaticly deleted before it gets to me. This thanks to
spam and viruses!

Problems/Bugs:
Before submitting a problem report please check the Known Problems section
to see if this problem has already been reported.  Be sure to include the
version number and also any details that may be relevant.

Chris Brady, Email: [e-mail]

With some PC's Memtest86 will just die with no hints as to what went wrong.
Without any details it is impossible to fix these failures.  Fixing these
problems will require debugging on your part. There is no point in reporting
these failures unless you have a Linux system and would be willing to debug
the failure.

Enhancements:
If you would like to request an enhancement please see if is already on
the Planned Features List before sending your request.  All requests will
be considered, but not all can be implemented.  If you are be interested in
contributing code please contact me so that the integration can be
co-ordinated.

Chris Brady, Email: [e-mail]

Questions:
Unfortunately, I do not have time to respond to any questions or provide
assistance with troubleshooting problems. Please read the Troubleshooting
and Known Problems sections for assistance with problems. These sections have
the answers for the questions that I have answers to. If there is not an
answer for your problem in these sections it is probably not something I can
help you with.



14) Known Problems
==================
Sometimes when booting from a floppy disk the following messages scroll up
on the screen:
        X:8000
        AX:0212
        BX:8600
        CX:0201
        DX:0000
This the BIOS reporting floppy disk read errors.  Either re-write or toss
the floppy disk.

Memtest86 has no support for multiple CPUs.  Memtest86 should run
without problems, but it will only use one CPU.

Memtest86 can not diagnose many types of PC failures.  For example a
faulty CPU that causes Windows to crash will most likely just cause
Memtest86 to crash in the same way.

There have been numerous reports of errors in only tests 5 and 8 on Athlon
systems.  Often the memory works in a different system or the vendor insists
that it is good.  In these cases the memory is not necessarily bad but is
not able to operate reliably at Athlon speeds.  Sometimes more conservative
memory timings on the motherboard will correct these errors.  In other
cases the only option is to replace the memory with better quality, higher
speed memory.  Don't buy cheap memory and expect it to work with an Athlon!

Memtest86 supports all types of memory.  If fact the test has absolutely
no knowledge of the memory type nor does it need to.  This not a problem
or bug but is listed here due to the many questions I get about this issue.

Changes in the compiler and loader have caused problems with
Memtest86 resulting in both build failures and errors in execution.  A
binary image (precomp.bin) of the test is included and may be used if
problems are encountered.

15) Planned Features List
=========================
This is a list of enhancements planned for future releases of Memtest86.
There is no timetable for when these will be implemented, if ever.

  - Option to allow printing of error information on an attached printer.
  - Option to write error information to a floppy disk.
  - Supply Memtest in RPM format.
  - Read and display RAM SPD information.


16) Change Log
==============
Enhancements in v3.2 (11/Nov/2004)

  Added two new, highly effective tests that use random number patterns
  (tests 4 and 6).

  Reworked the online commands:
	- Changed wording for better clarity
	- Dropped Cache Mode menu

  Updated CPU detection for newer AMD, Intel and Cyrix CPUs.

  Reworked test sequence:
	- Dropped ineffective non cached tests (Numbers 7-11) 
	- Changed cache mode to cached for test 2 
	- Fixed bug that did not allow tsome tests to be skipped
	- Added bailout for Bit fade test

  Error reports are highlighted in red to provide a more vivid error 
  indication.
	    
  Added support for a large number of additional chipsets. (from Memtest86+
  v1.30)

  Added an advanced setup feature that with new chiset allows memory timings
  to be altered from inside Memtest86. (from Memtest86+ v1.30)