bf533_ez-kit_adv7183_config.asm

ADI BLACKFIN BF533 的IIC驱动程序

/******************************************************************************/
//
// Name: 	BF533 EZ-KIT video ITU-656 8bit receive mode
//
/*****************************************************************************************************************
/*****************************************************************************************

(C) Copyright 2003 - Analog Devices, Inc.  All rights reserved.

File Name:				BF533_EZ-KIT_ADV7183.asm

Date Modified:			01/08/07		TL		Rev 2.0

Software:       		VisualDSP++4.5, Assembler 1.1.0.2, Linker 3.8.0.2

Hardware:				BF533 EZ-KIT Board (rev 1.2), Blackfin EZ-Extender (rev 1.2)

Chip:					ADSP-BF533 REV 0.2

Special Connections:  None

Purpose:		To configure the ADV video devices 
				
				
Program Parameters:

************************************************************************************************/

#include <defBF533.h>
					
/****************************************************************/
// Program Define Section
/****************************************************************/

#define rd_cmd				0x1				// sccb interface read command
#define wr_cmd				0x2				// sccb inteface write command
#define ADV7171_WR			0x54			// write address of video encoder
#define ADV7171_RD			0x55			// read address of video encoder
#define ADV7183A_WR			0x40			// read address of video decoder
#define ADV7183A_RD			0x41			// write address of video decoder
#define ADV7183B_WR			0x40			// Device address to read from the chip
#define ADV7183B_RD			0x41			// Device address to read from the chip
#define dummy_addr			0x14			//dummy read to check the ACK
#define ADV7171_reg_cnt		0x1a			// encoder register count (26 registers)
#define ADV7171_MR0			0x0				// mode reg 0 address of the encoder
#define ADV7171_MR1			0x1				// mode reg 1 address of the encoder
#define ADV7183_In_Control	0x0				// Input Control Regsiter of decoder
#define ADV7171_ColorBar	0x80
#define ADV7183_AVIN4		0x3
#define ADV7183_AVIN1		0x0
#define ADV7183_OE_bit		2				// ADV7183 /OE = PF2
#define ADV7183_OE			0x4				// ADV7183 /OE = PF2


.global		Config_of_ADV7183;
.global		Read_of_ADV7183_Config;
.global		Enable_ADV7183;
.extern		SCCB_Control;
.extern		SCCB_Word_Count;
.extern		SCCB_DataIn;				
.extern		SCCB_DataOut;				
.extern     SCCB_Interface;
.extern     SCCB_Read_Count;
.extern		SCCB_In_Progress;

/*************** SCCB Start Settings**************************************/
/*Before Calling the SCCB_Interface the inputs to the SCCB_Taskmanager 	 */
/*must be done. 														 */
/* Write to the "SCCB_Control" a "1" for reading from the Device or 	 */
/* a "2" for writing to the Device.										 */
/*																		 */
/* Leave the number of bytes totaly in "SCCB_Wordcount". Device Addresses*/
/* and Word Addresses included.											 */
/*																		 */
/* Write all data to the "SCCB_DataIn". 								 */
/* e.g.Writing to the device:											 */
/*																		 */
/*			SCCB_DataIn 			Device Address	(LSB must be Zero)	 */
/*									Word Address						 */
/*									Data 1								 */
/*									  .									 */
/*									  .									 */
/*************************************************************************/
/* (e.g.Reading from the device:										 */
/*			SCCB_DataIn 			Device Address	(LSB must be zero)   */
/*									Word Address						 */
/*									Device Address	(LSB must be one)	 */
/*									Data can be read via SCCB_DataOut	 */
/*************************************************************************/
/*	See below !!!!!!													 */
/*************************************************************************/

.section L1_code;

Enable_ADV7183:

	p0.l = lo(FIO_DIR);
	p0.h = hi(FIO_DIR);
	r0 = w[p0](z);
	bitset(r0, ADV7183_OE_bit);
	w[p0] = r0;

	//The Flag PF2 (ADV7183_OE) will be cleared to enable the all ADV outputs
	p0.l = lo(FIO_FLAG_C);			
	p0.h = hi(FIO_FLAG_C);			
	r0.l = ADV7183_OE;
	w[p0] = r0;

Enable_ADV7183.END:
RTS;
//***************************************************************
// write regs to the ADV7183 decoder
Config_of_ADV7183:
    
	p0.l = SCCB_DataIn;
	p0.h = SCCB_DataIn;
	r0 = ADV7183A_WR (z);           //Device select
	[p0++] = r0;
	r0 = ADV7183_In_Control (z);   //Device Subregister select
	[p0++] = r0;
	r0 = ADV7183_AVIN4 (z);        //Data to transfer in the register
	[p0++] = r0;

	p0.l = SCCB_Word_Count;
	p0.h = SCCB_Word_Count;
	r0 = 3 (z);             // Number of transfers in total
	[p0] = r0;
	
	p0.l = SCCB_Control;
	p0.h = SCCB_Control;
	r0 = wr_cmd (z);       //controls whether to read or to write
	[p0] = r0;
	
	p0.h = SCCB_In_Progress;       //takes care that the next transfer will not start
	p0.l = SCCB_In_Progress;       //before the last one ends
	r0 = 1;
	[p0] = r0;

Config_of_ADV7183.END:	
RTS;

//***************************************************************
// Read regs from ADV7183 decoder
Read_of_ADV7183_Config:

	p0.l = SCCB_DataIn;
	p0.h = SCCB_DataIn;
	r0 = ADV7183A_WR (z);			//Device select to write
	[p0++] = r0;
	r0 = ADV7183_In_Control (z);	//Device Subregister select
	[p0++] = r0;
	r0 = ADV7183A_RD (z);			//Device select to read
	[p0++] = r0;
	
	p0.l = SCCB_Word_Count;
	p0.h = SCCB_Word_Count;
	r0 = 4 (z);             		// Number of transfers in total
	[p0] = r0;
	
	p0.l = SCCB_Control;
	p0.h = SCCB_Control;
	r0 = rd_cmd (z);       			//controls whether to read or to write
	[p0] = r0;
	
	p0.h = SCCB_In_Progress;       //takes care that the next transfer will not start
	p0.l = SCCB_In_Progress;       //before the last one ends
	r0 = 1;
	[p0] = r0;
	
Read_of_ADV7183_Config.END:

RTS;