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📄 bf533_ez-kit_isr_config.asm

📁 ADI BLACKFIN BF533 的IIC驱动程序
💻 ASM
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/******************************************************************************/
//
// Name: 	BF533 EZ-KIT video ITU-656 receive mode (8bit) for the Omnivision chip OV6630
//
/*****************************************************************************************

(C) Copyright 2003 - Analog Devices, Inc.  All rights reserved.

File Name:				BF533_EZ-KIT_ISR_Config.asm

Date Modified:			01/08/07		TL		Rev 2.0

Software:       		VisualDSP++4.5, Assembler 1.1.0.2, Linker 3.8.0.2

Hardware:				BF533 EZ-KIT Board (rev 1.2), Blackfin EZ-Extender (rev 1.2)

Chip:					ADSP-BF533 REV 0.2

Special Connections:  	None

Purpose:				Interrupt priority and masking 
				
				
Program Parameters:

********************************************************************************/
#include <defBF533.h>

/*****************************************************************************************/
// Global and extern subroutines
/*****************************************************************************************/

.global		BF533_EZ_KIT_ISR_Config;
.extern PPI_DMA_ISR;


/*****************************************************************************************/
// Program
/*****************************************************************************************/
.section L1_code;

BF533_EZ_KIT_ISR_Config:



	//Link the DMA interrupt subroutine to the DSP interrupt event 8
	p0.h = hi(EVT8);
	p0.l = lo(EVT8);
    r0.l = PPI_DMA_ISR;
	r0.h = PPI_DMA_ISR; 	// IVG8 Handler
  	[p0] = r0;

	
	p0.h = hi(SIC_RVECT);
	p0.l = lo(SIC_RVECT);
	
	//enables the DMA interrupt by setting the System Interrupt Controller 
	r0 = 0x0100(z);	[p0+SIC_ISR-SIC_RVECT] = r0;
	//enables the DMA interrupt by setting the System Interrupt IMASK Register
	r0 = 0x0100(z);	[p0+SIC_IMASK-SIC_RVECT] = r0;
	

	//The DMA is linked to interrupt vector 8 IVG8
	r0.l =  lo(P8_IVG(8) | P9_IVG(14) | P10_IVG(14) | P11_IVG(14));
	[p0+SIC_IAR1-SIC_RVECT] = r0;

	
	//Finally the DMA interrupt has been enabled at the core level
	p0.h = hi(IMASK);
	p0.l = lo(IMASK);
	r0 = [p0];	
	r1= 0x0100;
	r0 = r0 | r1; 
	[p0] = r0;
	
BF533_EZ_KIT_ISR_Config.END:
RTS;
/*******************************************************************************/

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