isr_l1.c

以TI 公司的OMAP5910为例

//////////////////////////////////////////////////////////////////////////
//            Copyright (C) 2004, Eyoka @ Microunit
//                           All Rights Reserved
//________________________________________________________________________
//
// FILENAME:    isr_l1.c
// PROJECT:     High-Resolution Video System On OMAP
// MODULE:      MPU Framework
// DESCRIPTION: Level-1 Interrupt Handlers.(customized)
// TARGET CPU:  ARM-925T of OMAP5910
// VERSION:     0.2
//________________________________________________________________________
//
// REVISE HISTORY
// DATE         VERSION AUTHOR  DESCRIPTION
// 2004-11-08   0.2     Eyoka   Checked.
// 2004-11-05   0.1     Eyoka   Created.
//////////////////////////////////////////////////////////////////////////

#include "sys.h"
#include "armdsp.h"


extern volatile BOOL g_bDSPReady;
extern volatile BOOL g_bReadCamera;
extern volatile WORD g_bufTran;

extern volatile WORD g_StatusJPGENC;

/////////////////////////////////////////////////////////////////////
// Level-1 Interrupt Handlers
/////////////////////////////////////////////////////////////////////

//___________________________________________________________________
//
// ISR_Camera: triggered by each new frame start.
//___________________________________________________________________
//
void ISR_Camera(void)
{
	if(!(CAM_IT_STATUS & 0x0001))
	{
		return;
	}

	if(!g_bReadCamera)
	{
		return;
	}

	if(DMA_IsBusy(0))
	{
		return;
	}

	DMA_CDSA_U(0) = g_bufTran;
	DMA_Start(0);

	g_bReadCamera = FALSE;
}

//___________________________________________________________________
//
// ISR_Mailbox1: triggered by DSP write mailbox DSP2ARM1.
//___________________________________________________________________
//
void ISR_Mailbox1(void)
{
	WORD data, cmd;
	MBX_Read1(&data, &cmd);
/*
	if(MBX1CMD_JPG_ENCODE == cmd)
	{
		g_StatusJPGENC = data;
	}
*/
}



// the end
//////////////////////////////////////////////////////////////////////////