isr.c

以TI 公司的OMAP5910为例

//////////////////////////////////////////////////////////////////////////
//            Copyright (C) 2004, Eyoka @ Microunit
//                           All Rights Reserved
//________________________________________________________________________
//
// FILENAME:    isr.c
// PROJECT:     High-Resolution Video System On OMAP
// MODULE:      MPU Framework
// DESCRIPTION: Interrupt Service Routines.
// TARGET CPU:  ARM-925T of OMAP5910
// VERSION:     0.2
//________________________________________________________________________
//
// REVISE HISTORY
// DATE         VERSION AUTHOR  DESCRIPTION
// 2004-11-08   0.2     Eyoka   Checked.
// 2004-11-02   0.1     Eyoka   Created.
//////////////////////////////////////////////////////////////////////////

#include "int.h"


/////////////////////////////////////////////////////////////////////
// Custom Handler Table
/////////////////////////////////////////////////////////////////////
DWORD ISRTAB_L1[32];
DWORD ISRTAB_L2[32];
DWORD ISRTAB_SW[32];
asm("_swi_tab	.word	_ISRTAB_SW");

/////////////////////////////////////////////////////////////////////
// Interrupt Service Routines
/////////////////////////////////////////////////////////////////////

//___________________________________________________________________
//
// ISR_UDEF: Undefined-Instruction Interrupt Service Routine.
//___________________________________________________________________
//
#pragma INTERRUPT(ISR_UDEF, UDEF)
interrupt void ISR_UDEF(void)
{
	puts("undefined instruction");
	asm("L_UDEF		B	L_UDEF");
}

//___________________________________________________________________
//
// ISR_SWI: Software Interrupt Service Routine.
//___________________________________________________________________
//
#pragma INTERRUPT(ISR_SWI, SWI)
interrupt void ISR_SWI(void)
{
	asm("	STMFD	SP!, {R0-R5, LR}");

	// load the SWI instruction to R4
	asm("	LDR		R4, [LR, #-4]");
	// get SWI ID from SWI instruction
	asm("	MOV		R5, #0x0000001F");
	asm("	AND		R4, R4, R5");
	// load corresponding swi service function address to R5
	asm("	LDR		R5, _swi_tab");
	asm("	LDR		R5, [R5, R4, LSL#2]");
	// call swi service function
	asm("	MOV		LR, PC");
	asm("	BX		R5");

	asm("	LDMFD	SP!, {R0-R5, LR}");
}

//___________________________________________________________________
//
// ISR_PABT: Prefetch-Abort Interrupt Service Routine.
//___________________________________________________________________
//
#pragma INTERRUPT(ISR_PABT, PABT)
interrupt void ISR_PABT(void)
{
	puts("prefetch abort");
	asm("L_PABT		B	L_PABT");
}

//___________________________________________________________________
//
// ISR_DABT: Data-Abort Interrupt Service Routine.
//___________________________________________________________________
//
#pragma INTERRUPT(ISR_DABT, DABT)
interrupt void ISR_DABT(void)
{
	puts("data abort");
	asm("L_DABT		B	L_DABT");
}

//___________________________________________________________________
//
// ISR_IRQ: IRQ Service Routine, dispatch to other ISRs.
//___________________________________________________________________
//
//#pragma INTERRUPT(ISR_IRQ, IRQ)
interrupt void ISR_IRQ(void)
{
	INT_L1_EVT_t event = (INT_L1_EVT_t)MPU_L1_SIR_IRQ_CODE;

	if(0 == event)
	{
		puts("! do not support level-2 IRQ");
		return;
	}

	INT_L1_Disable(event);

	switch(event)
	{
	case L1EVT_CAMERA:
		ISR_Camera();
		break;

	case L1EVT_MAILBOX1:
		ISR_Mailbox1();
		break;

	default:
		puts("! unhandled level1 IRQ");
		return;
	}

	INT_NewIRQ();
	INT_L1_Enable(event);
}

//___________________________________________________________________
//
// ISR_FIQ: FIQ Service Routine.
//___________________________________________________________________
//
#pragma INTERRUPT(ISR_FIQ, FIQ)
interrupt void ISR_FIQ(void)
{
	puts("responsing FIQ");
	asm("L_FIQ		B	L_FIQ");
}



// the end
//////////////////////////////////////////////////////////////////////////