int.h

以TI 公司的OMAP5910为例

//////////////////////////////////////////////////////////////////////////
//            Copyright (C) 2004, Eyoka @ Microunit
//                           All Rights Reserved
//________________________________________________________________________
//
// FILENAME:    int.h
// PROJECT:     High-Resolution Video System On OMAP
// MODULE:      MPU System
// DESCRIPTION: MPU Interrupt Interface.
// TARGET CPU:  ARM-925T of OMAP5910
// VERSION:     0.3
//________________________________________________________________________
//
// REVISE HISTORY
// DATE         VERSION AUTHOR  DESCRIPTION
// 2004-11-08   0.3     Eyoka   Checked.
// 2004-11-02   0.2     Eyoka   Modified.
// 2004-11-01   0.1     Eyoka   Created.
//////////////////////////////////////////////////////////////////////////

#ifndef _INT_H_
#define _INT_H_

#include "datatypes.h"


/////////////////////////////////////////////////////////////////////
// INTERRUPT REGISTERS
/////////////////////////////////////////////////////////////////////

//======================================
// Level-1
//======================================
#define MPU_L1_ITR				REG32(0xFFFECB00)
#define MPU_L1_MIR				REG32(0xFFFECB04)
#define MPU_L1_SIR_IRQ_CODE		REG32(0xFFFECB10)
#define MPU_L1_SIR_FIQ_CODE		REG32(0xFFFECB14)
#define MPU_L1_CONTROL_REG		REG32(0xFFFECB18)
#define MPU_L1_ILR(i)			REG32(0xFFFECB1C + i*4)
#define MPU_L1_ISR				REG32(0xFFFECB9C)

//======================================
// Level-2
//======================================
#define MPU_L2_ITR				REG32(0xFFFE0000)
#define MPU_L2_MIR				REG32(0xFFFE0004)
#define MPU_L2_SIR_IRQ_CODE		REG32(0xFFFE0010)
#define MPU_L2_SIR_FIQ_CODE		REG32(0xFFFE0014)
#define MPU_L2_CONTROL_REG		REG32(0xFFFE0018)
#define MPU_L2_ILR(i)			REG32(0xFFFE001C + i*4)
#define MPU_L2_ISR				REG32(0xFFFE009C)


/////////////////////////////////////////////////////////////////////
// EVENT MAPPING
/////////////////////////////////////////////////////////////////////

//======================================
// Level-1
//======================================
typedef enum
{
	L1EVT_L2IRQ			= 0,
	L1EVT_CAMERA		= 1,
//	RESERVED			= 2,
	L1EVT_EX_FIQ		= 3,
	L1EVT_McBSP2_TX		= 4,
	L1EVT_McBSP2_RX		= 5,
	L1EVT_RXTD			= 6,
	L1EVT_DPSMMU_ABORT	= 7,
	L1EVT_HOST			= 8,
	L1EVT_ABORT			= 9,
	L1EVT_MAILBOX1		= 10,
	L1EVT_MAILBOX2		= 11,
//	RESERVED			= 12,
	L1EVT_TIPB_BRIDGE1	= 13,
	L1EVT_GPIO			= 14,
	L1EVT_UART3			= 15,
	L1EVT_TIMER3		= 16,
	L1EVT_LBMMU			= 17,
//	RESERVED			= 18,
	L1EVT_DMA0_6		= 19,
	L1EVT_DMA1_7		= 20,
	L1EVT_DMA2_8		= 21,
	L1EVT_DMA3			= 22,
	L1EVT_DMA4			= 23,
	L1EVT_DMA5			= 24,
	L1EVT_DMA_LCD		= 25,
	L1EVT_TIMER1		= 26,
	L1EVT_WDG_TIMER		= 27,
	L1EVT_TIPB_BRIDGE2	= 28,
	L1EVT_LOCAL_BUS		= 29,
	L1EVT_TIMER2		= 30,
	L1EVT_LCD_CTRL		= 31
}
INT_L1_EVT_t;

//======================================
// Level-2
//======================================
typedef enum
{
	L2EVT_FAC			= 0,
	L2EVT_KEYBOARD		= 1,
	L2EVT_UWIRE_TX		= 2,
	L2EVT_UWIRE_RX		= 3,
	L2EVT_I2C			= 4,
	L2EVT_MPUIO			= 5,
	L2EVT_USB_HHC1		= 6,
//	RESERVED			= 7,	swi: EnableIRQ
//	RESERVED			= 8,    swi: DisableIRQ
//	RESERVED			= 9,
	L2EVT_McBSP3_TX		= 10,
	L2EVT_McBSP3_RX		= 11,
	L2EVT_McBSP1_TX		= 12,
	L2EVT_McBSP1_RX		= 13,
	L2EVT_UART1_BT		= 14,
	L2EVT_UART2_COM		= 15,
	L2EVT_MCSI1			= 16,
	L2EVT_MCSI2			= 17,
//	RESERVED			= 18,
//	RESERVED			= 19,
//	RESERVED			= 20,
//	RESERVED			= 21,
	L2EVT_TIMER_32K		= 22,
	L2EVT_MMC			= 23,
	L2EVT_ULPD			= 24,
	L2EVT_RTC_TIMER		= 25,
	L2EVT_RTC_ALARM		= 26,
//	RESERVED			= 27,
	L2EVT_DSPMMU		= 28,
//	RESERVED			= 29,
//	RESERVED			= 30,
	L2EVT_McBSP2_OF		= 31
}
INT_L2_EVT_t;


/////////////////////////////////////////////////////////////////////
// Interrupt Service Routines
/////////////////////////////////////////////////////////////////////

void ISR_UDEF(void);
void ISR_SWI(void);
void ISR_PABT(void);
void ISR_DABT(void);
void ISR_IRQ(void);
void ISR_FIQ(void);


/////////////////////////////////////////////////////////////////////
// CUSTOM INTERRUPT HANDLERS
/////////////////////////////////////////////////////////////////////

//======================================
// Handler Table
//======================================
extern DWORD ISRTAB_L1[];
extern DWORD ISRTAB_L2[];
extern DWORD ISRTAB_SW[];


//======================================
// Level-1
//======================================
void ISR_Camera(void);
void ISR_Mailbox1(void);

//======================================
// Level-2
//======================================
//__________________
//            
// UNFINISHED 
//__________________
//

//======================================
// Software Interrupt
//======================================
void ISR_EnableIRQ(BOOL bEnable);
void ISR_EnableFIQ(BOOL bEnable);


//======================================
// Eeception
//======================================
//__________________
//            
// UNFINISHED 
//__________________
//


/////////////////////////////////////////////////////////////////////
// INTERRUPT INTERFACE FUNCTIONS
/////////////////////////////////////////////////////////////////////

//___________________________________________________________________
// Function: INT_ClearAll
// Usage: Clear and mask all interrupts.
// Parameters:		N/A
// Return Values:	N/A
//___________________________________________________________________
//
void INT_ClearAll(void);

//___________________________________________________________________
// Function: INT_L1_Enable
// Usage: Enable Single level-1 interrupt
// Parameters:
//	event			interrupt index.
// Return Values:	N/A
//___________________________________________________________________
//
void INT_L1_Enable(INT_L1_EVT_t event);

//___________________________________________________________________
// Function: INT_L1_Disable
// Usage: Disable Single level-1 interrupt
// Parameters:
//	event			interrupt index.
// Return Values:	N/A
//___________________________________________________________________
//
void INT_L1_Disable(INT_L1_EVT_t event);

//___________________________________________________________________
// Function: INT_NewIRQ
// Usage: Enable new IRG agreement.
// Parameters:		N/A
// Return Values:	N/A
//___________________________________________________________________
//
void INT_NewIRQ(void);

//___________________________________________________________________
// Function: INT_NewFIQ
// Usage: Enable new FIQ agreement.
// Parameters:		N/A
// Return Values:	N/A
//___________________________________________________________________
//
void INT_NewFIQ(void);

//___________________________________________________________________
// Function: INT_L1_SetupEntry
// Usage: Setup level-1 interrupt event handler.
// Parameters:
//	event			interrupt index.
//	priority		priority level
//	bLevel			TRUE for Low-Level, FALSE for Fall-Edge.
//	bFIQ			TRUE for FIQ, FALSE for IRQ.
// Return Values:	N/A
//___________________________________________________________________
//
void INT_L1_SetupEntry(INT_L1_EVT_t event,
						int priority, BOOL bLevel, BOOL bFIQ);
						


#endif	// ifndef _INT_H_