i2cmpin.h

DSP28X通訊程式

;==================================================================================
;File name  : VI2CMPIN.H                  
;                    
;Originator : Digital Control Systems Group
;             Texas Instruments
;Description: 
;             Header file to select the I/O pin for I2C signals viz.,
;             SCL & SDA
;                               
;Date       : 30/01/2002 (DD/MM/YYYY)
;==================================================================================

; Bit mask to input to the I/O util
BIT_0               .set    0000h   ;Bit mask for 0
BIT_1               .set    0001h   ;Bit mask for 1
BIT_2               .set    0002h   ;Bit mask for 2
BIT_3               .set    0003h   ;Bit mask for 3
BIT_4               .set    0004h   ;Bit mask for 4
BIT_5               .set    0005h   ;Bit mask for 5
BIT_6               .set    0006h   ;Bit mask for 6
BIT_7               .set    0007h   ;Bit mask for 7  
BIT_8               .set    0008h   ;Bit mask for 0
BIT_9               .set    0009h   ;Bit mask for 1
BIT_10              .set    000Ah   ;Bit mask for 2
BIT_11              .set    000Bh   ;Bit mask for 3
BIT_12              .set    000Ch   ;Bit mask for 4
BIT_13              .set    000Dh   ;Bit mask for 5
BIT_14              .set    000Eh   ;Bit mask for 6
BIT_15              .set    000Fh   ;Bit mask for 7 

; GPIO Direction Control Register
GPADIR				.set 	70C1h
GPBDIR 				.set 	70C5h
GPDDIR 				.set 	70CDh
GPEDIR 				.set  	70D1h
GPFDIR 				.set  	70D5h 	
GPGDIR 				.set  	70D9h

; GPIO Mux Control Register     
GPAMUX				.set 	70C0h
GPBMUX 				.set 	70C4h
GPDMUX 				.set 	70CCh
GPEMUX 				.set  	70D0h
GPFMUX 				.set  	70D4h 	
GPGMUX 				.set  	70D8h

;*****************************************************************
; Symbolic constants to define the I/O pins to be used for vI2C
; Edit the following symbolic constants to define the i/o pins 
; for SDA and SCL signals
;*****************************************************************
; I/O pin selection for SCL
SCL_MUX     .set    GPFMUX
SCL_DIR     .set    GPFDIR
SCL_BIT     .set    BIT_2
  
; I/O pin selection for SDA  
SDA_MUX     .set    GPFMUX
SDA_DIR     .set    GPFDIR
SDA_BIT     .set    BIT_1
                                 
;****************************************************************

; Bit mask for control and status register
ACKSTAT_BIT .set    0
ACKDT_BIT   .set    1

IDLE_INDEX      .set    0h
START_S1_INDEX  .set    02h  
START_S2_INDEX  .set    04h
START_S3_INDEX  .set    06h
START_S4_INDEX  .set    08h
STOP_S1_INDEX   .set    0Ah
STOP_S2_INDEX   .set    0Ch
STOP_S3_INDEX   .set    0Eh
RSTART_S1_INDEX .set    10h
RSTART_S2_INDEX .set    12h
RSTART_S3_INDEX .set    14h
ACK_S1_INDEX    .set    16h
ACK_S2_INDEX    .set    18h
ACK_S3_INDEX    .set    1Ah
RECV_S1_INDEX   .set    1Ch
RECV_S2_INDEX   .set    1Eh
RECV_S3_INDEX   .set    20h
TXMIT_S1_INDEX  .set    22h
TXMIT_S2_INDEX  .set    24h
TXMIT_S3_INDEX  .set    26h
TXMIT_S4_INDEX  .set    28h
TXMIT_S5_INDEX  .set    2Ah
TXMIT_S6_INDEX  .set    2Ch