lcd.map.eqn

这是一个用VHDL +图形法在CPLD内部搭建的液晶显示的驱动程序。液晶是ocmj5*10系列

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--D1_req is state:inst2|req
--operation mode is normal

D1_req_lut_out = J1_3 & (D1_next_state.s_b & (!lcd_busy) # !D1_next_state.s_b & D1_req) # !J1_3 & D1_req;
D1_req = DFFEAS(D1_req_lut_out, B1_Q, VCC, , , , , , );


--J1_3 is try:inst9|DFF2:inst|3
--operation mode is normal

J1_3_lut_out = VCC;
J1_3 = DFFEAS(J1_3_lut_out, G1_inst12, !H1_s1, , , , , , );


--D1_data_out[7] is state:inst2|data_out[7]
--operation mode is normal

D1_data_out[7]_lut_out = D1_data_out[7] & (D1L127 # D1L129 & !D1L120) # !D1_data_out[7] & (D1L129 & !D1L120);
D1_data_out[7] = DFFEAS(D1_data_out[7]_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1_data_out[6] is state:inst2|data_out[6]
--operation mode is normal

D1_data_out[6]_lut_out = D1_next_state.s2 & E1_19 # !D1_next_state.s2 & (D1L130 # D1L131);
D1_data_out[6] = DFFEAS(D1_data_out[6]_lut_out, B1_Q, VCC, , D1L26, , , , );


--D1_data_out[5] is state:inst2|data_out[5]
--operation mode is normal

D1_data_out[5]_lut_out = D1_next_state.s2 & E1_18 # !D1_next_state.s2 & (D1L132);
D1_data_out[5] = DFFEAS(D1_data_out[5]_lut_out, B1_Q, VCC, , D1L26, , , , );


--D1_data_out[4] is state:inst2|data_out[4]
--operation mode is normal

D1_data_out[4]_lut_out = D1L134 # D1L152 # D1L137 & D1L28;
D1_data_out[4] = DFFEAS(D1_data_out[4]_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1_data_out[3] is state:inst2|data_out[3]
--operation mode is normal

D1_data_out[3]_lut_out = D1L153 # D1L139 # D1_data_out[3] & D1L141;
D1_data_out[3] = DFFEAS(D1_data_out[3]_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1_data_out[2] is state:inst2|data_out[2]
--operation mode is normal

D1_data_out[2]_lut_out = D1L143 & (!D1L125 # !D1L18 # !D1L41);
D1_data_out[2] = DFFEAS(D1_data_out[2]_lut_out, B1_Q, VCC, , D1L26, , , , );


--D1_data_out[1] is state:inst2|data_out[1]
--operation mode is normal

D1_data_out[1]_lut_out = D1L145 & (!D1L125 # !D1L18 # !D1L41);
D1_data_out[1] = DFFEAS(D1_data_out[1]_lut_out, B1_Q, VCC, , D1L26, , , , );


--D1_data_out[0] is state:inst2|data_out[0]
--operation mode is normal

D1_data_out[0]_lut_out = D1_data_out[0] & (D1L141 # D1L148) # !D1_data_out[0] & (!D1L120 & D1L148);
D1_data_out[0] = DFFEAS(D1_data_out[0]_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1_next_state.s_b is state:inst2|next_state.s_b
--operation mode is normal

D1_next_state.s_b_lut_out = !D1_next_state.s8 & D1L18 # !lcd_busy # !D1_req;
D1_next_state.s_b = DFFEAS(D1_next_state.s_b_lut_out, B1_Q, VCC, , J1_3, , , , );


--B1_Q is freq:inst|Q
--operation mode is normal

B1_Q_lut_out = B1_Q $ (B1L18 & B1_i[0] & B1L19);
B1_Q = DFFEAS(B1_Q_lut_out, clk, VCC, , , , , , );


--A1L95 is inst14~37
--operation mode is normal

A1L95 = !E1_15 & !E1_14 & !xwe;


--G1_inst12 is try:inst9|inst12
--operation mode is normal

G1_inst12 = E1_16 & A1L95 & E1_13 & E1_12;


--H1_s1 is dd:inst10|s1
--operation mode is normal

H1_s1_lut_out = D1_clear;
H1_s1 = DFFEAS(H1_s1_lut_out, D1_clear, !inst14, , , , , , );


--D1L120 is state:inst2|process0~225
--operation mode is normal

D1L120 = D1_req # lcd_busy;


--D1_next_state.s2 is state:inst2|next_state.s2
--operation mode is normal

D1_next_state.s2_lut_out = D1_next_state.s1;
D1_next_state.s2 = DFFEAS(D1_next_state.s2_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1_next_state.s9 is state:inst2|next_state.s9
--operation mode is normal

D1_next_state.s9_lut_out = D1L122 & (D1L123 # D1_next_state.s9 & !D1L149) # !D1L122 & (D1_next_state.s9 & !D1L149);
D1_next_state.s9 = DFFEAS(D1_next_state.s9_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1_next_state.s3 is state:inst2|next_state.s3
--operation mode is normal

D1_next_state.s3_lut_out = D1_next_state.s2;
D1_next_state.s3 = DFFEAS(D1_next_state.s3_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1L18 is state:inst2|data_out[2]~794
--operation mode is normal

D1L18 = !D1_next_state.s9 & !D1_next_state.s3;


--D1_next_state.s1 is state:inst2|next_state.s1
--operation mode is normal

D1_next_state.s1_lut_out = D1_next_state.s0;
D1_next_state.s1 = DFFEAS(D1_next_state.s1_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1_next_state.s6 is state:inst2|next_state.s6
--operation mode is normal

D1_next_state.s6_lut_out = D1_next_state.s5;
D1_next_state.s6 = DFFEAS(D1_next_state.s6_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1_next_state.s5 is state:inst2|next_state.s5
--operation mode is normal

D1_next_state.s5_lut_out = D1_next_state.s4;
D1_next_state.s5 = DFFEAS(D1_next_state.s5_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1L125 is state:inst2|Select~3585
--operation mode is normal

D1L125 = !D1_next_state.s1 & !D1_next_state.s6 & !D1_next_state.s5;


--D1_next_state.s8 is state:inst2|next_state.s8
--operation mode is normal

D1_next_state.s8_lut_out = D1_next_state.s7;
D1_next_state.s8 = DFFEAS(D1_next_state.s8_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1_next_state.s7 is state:inst2|next_state.s7
--operation mode is normal

D1_next_state.s7_lut_out = D1_next_state.s6;
D1_next_state.s7 = DFFEAS(D1_next_state.s7_lut_out, B1_Q, VCC, , D1L119, , , , );


--D1L19 is state:inst2|data_out[2]~795
--operation mode is normal

D1L19 = D1L18 & D1L125 & !D1_next_state.s8 & !D1_next_state.s7;


--D1_next_state.s4 is state:inst2|next_state.s4
--operation mode is normal

D1_next_state.s4_lut_out = D1_next_state.s4 & (D1L123 & !D1L122 # !D1L149) # !D1_next_state.s4 & D1L123 & (!D1L122);
D1_next_state.s4 = DFFEAS(D1_next_state.s4_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1_next_state.s0 is state:inst2|next_state.s0
--operation mode is normal

D1_next_state.s0_lut_out = D1_next_state.s0 & (!D1_next_state.s_b & !D1L150 # !D1L149) # !D1_next_state.s0 & !D1_next_state.s_b & !D1L150;
D1_next_state.s0 = DFFEAS(D1_next_state.s0_lut_out, B1_Q, VCC, , J1_3, , , , );


--D1L126 is state:inst2|Select~3586
--operation mode is normal

D1L126 = D1_next_state.s_b & (!D1_next_state.s4 & !D1_next_state.s0);


--D1L127 is state:inst2|Select~3587
--operation mode is normal

D1L127 = D1L120 & (D1_next_state.s2 # !D1L19) # !D1L126;


--C1_data_out[7] is ram:inst1|data_out[7]
--operation mode is normal

C1_data_out[7]_lut_out = D1_i[4] & C1L275 # !D1_i[4] & (C1L285);
C1_data_out[7] = DFFEAS(C1_data_out[7]_lut_out, clk, VCC, , , , , , );


--D1L128 is state:inst2|Select~3588
--operation mode is normal

D1L128 = D1_next_state.s4 # D1_next_state.s0 # C1_data_out[7] & !D1L18;


--C1_data_out[6] is ram:inst1|data_out[6]
--operation mode is normal

C1_data_out[6]_lut_out = D1_i[4] & C1L295 # !D1_i[4] & (C1L305);
C1_data_out[6] = DFFEAS(C1_data_out[6]_lut_out, clk, VCC, , , , , , );


--C1_data_out[5] is ram:inst1|data_out[5]
--operation mode is normal

C1_data_out[5]_lut_out = D1_i[4] & C1L315 # !D1_i[4] & (C1L325);
C1_data_out[5] = DFFEAS(C1_data_out[5]_lut_out, clk, VCC, , , , , , );


--D1L97 is state:inst2|LessThan~741
--operation mode is normal

D1L97 = C1_data_out[6] # C1_data_out[5];


--D1L41 is state:inst2|i[4]~706
--operation mode is normal

D1L41 = !D1_next_state.s8 & !D1_next_state.s7;


--D1L129 is state:inst2|Select~3589
--operation mode is normal

D1L129 = D1L128 # !D1L41 & (C1_data_out[7] $ D1L97);


--D1L130 is state:inst2|Select~3591
--operation mode is normal

D1L130 = D1L41 & D1L125 & (C1_data_out[6] # D1L18);


--D1L131 is state:inst2|Select~3592
--operation mode is normal

D1L131 = D1_next_state.s8 & (C1_data_out[6] $ !C1_data_out[5]) # !D1_next_state.s8 & D1_next_state.s7 & (C1_data_out[6] $ !C1_data_out[5]);


--D1L26 is state:inst2|data_out[6]~796
--operation mode is normal

D1L26 = J1_3 & D1_next_state.s_b & !D1_req & !lcd_busy;


--D1L132 is state:inst2|Select~3594
--operation mode is normal

D1L132 = D1L41 & D1L125 & (D1L18 # C1_data_out[5]) # !D1L41 & (!C1_data_out[5]);


--D1L133 is state:inst2|Select~3596
--operation mode is normal

D1L133 = !D1_next_state.s2 & !D1_next_state.s1 & !D1_next_state.s6 & !D1_next_state.s5;


--D1L134 is state:inst2|Select~3597
--operation mode is normal

D1L134 = D1_data_out[4] & (D1L120 & !D1L133 # !D1L126);


--D1L135 is state:inst2|Select~3598
--operation mode is normal

D1L135 = D1_next_state.s4 # D1_next_state.s0 # D1_next_state.s2 & E1_17;


--D1L1 is state:inst2|add~1180
--operation mode is normal

D1L1_carry_eqn = D1L3;
D1L1 = D1_i[5] $ (D1L1_carry_eqn);


--D1_i[4] is state:inst2|i[4]
--operation mode is arithmetic

D1_i[4]_carry_eqn = D1L37;
D1_i[4]_lut_out = D1_i[4] $ (!D1_i[4]_carry_eqn);
D1_i[4] = DFFEAS(D1_i[4]_lut_out, B1_Q, VCC, , D1L43, , , D1L39, );

--D1L42 is state:inst2|i[4]~708
--operation mode is arithmetic

D1L42 = CARRY(D1_i[4] & (!D1L37));


--D1L136 is state:inst2|Select~3599
--operation mode is normal

D1L136 = D1L1 & (D1_next_state.s5 # D1_i[4] & D1_next_state.s1) # !D1L1 & D1_i[4] & D1_next_state.s1;


--D1L137 is state:inst2|Select~3600
--operation mode is normal

D1L137 = D1_next_state.s8 # D1_next_state.s7 # D1_next_state.s9 # D1_next_state.s3;


--C1_data_out[4] is ram:inst1|data_out[4]
--operation mode is normal

C1_data_out[4]_lut_out = D1_i[4] & C1L335 # !D1_i[4] & (C1L345);
C1_data_out[4] = DFFEAS(C1_data_out[4]_lut_out, clk, VCC, , , , , , );


--D1L28 is state:inst2|data_out~797
--operation mode is normal

D1L28 = D1_req & D1_data_out[4] # !D1_req & (lcd_busy & D1_data_out[4] # !lcd_busy & (C1_data_out[4]));


--D1_i[3] is state:inst2|i[3]
--operation mode is arithmetic

D1_i[3]_carry_eqn = D1L35;
D1_i[3]_lut_out = D1_i[3] $ (D1_i[3]_carry_eqn);
D1_i[3] = DFFEAS(D1_i[3]_lut_out, B1_Q, VCC, , D1L43, , , D1L39, );

--D1L37 is state:inst2|i[3]~712
--operation mode is arithmetic

D1L37 = CARRY(!D1L35 # !D1_i[3]);


--D1L2 is state:inst2|add~1185
--operation mode is arithmetic

D1L2_carry_eqn = D1L5;
D1L2 = D1_i[4] $ (!D1L2_carry_eqn);

--D1L3 is state:inst2|add~1187
--operation mode is arithmetic

D1L3 = CARRY(D1_i[4] & (!D1L5));


--D1L138 is state:inst2|Select~3602
--operation mode is normal

D1L138 = D1_i[3] & (D1_next_state.s1 # D1L2 & D1_next_state.s5) # !D1_i[3] & D1L2 & D1_next_state.s5;


--C1_data_out[3] is ram:inst1|data_out[3]
--operation mode is normal

C1_data_out[3]_lut_out = D1_i[4] & C1L355 # !D1_i[4] & (C1L365);
C1_data_out[3] = DFFEAS(C1_data_out[3]_lut_out, clk, VCC, , , , , , );


--D1L139 is state:inst2|Select~3603
--operation mode is normal

D1L139 = D1L137 & (D1L120 & D1_data_out[3] # !D1L120 & (C1_data_out[3]));


--D1L140 is state:inst2|Select~3604
--operation mode is normal

D1L140 = D1_next_state.s0 # !D1_next_state.s_b;


--D1L141 is state:inst2|Select~3605
--operation mode is normal

D1L141 = D1L140 # D1L120 & (D1_next_state.s4 # !D1L133);


--D1L4 is state:inst2|add~1190
--operation mode is arithmetic

D1L4_carry_eqn = D1L7;
D1L4 = D1_i[3] $ (D1L4_carry_eqn);

--D1L5 is state:inst2|add~1192
--operation mode is arithmetic

D1L5 = CARRY(!D1L7 # !D1_i[3]);


--D1L20 is state:inst2|data_out[2]~798
--operation mode is normal

D1L20 = !D1_next_state.s6 & !D1_next_state.s5;


--D1_i[2] is state:inst2|i[2]
--operation mode is arithmetic

D1_i[2]_carry_eqn = D1L33;
D1_i[2]_lut_out = D1_i[2] $ (!D1_i[2]_carry_eqn);
D1_i[2] = DFFEAS(D1_i[2]_lut_out, B1_Q, VCC, , D1L43, , , D1L39, );

--D1L35 is state:inst2|i[2]~716
--operation mode is arithmetic

D1L35 = CARRY(D1_i[2] & (!D1L33));


--D1L21 is state:inst2|data_out[2]~799
--operation mode is normal

D1L21 = D1_next_state.s6 # D1_next_state.s1 & (!D1_next_state.s5);


--C1_data_out[2] is ram:inst1|data_out[2]
--operation mode is normal

C1_data_out[2]_lut_out = D1_i[4] & C1L375 # !D1_i[4] & (C1L385);
C1_data_out[2] = DFFEAS(C1_data_out[2]_lut_out, clk, VCC, , , , , , );


--D1L142 is state:inst2|Select~3607
--operation mode is normal

D1L142 = D1L20 & (D1L21 & D1_i[2] # !D1L21 & (C1_data_out[2])) # !D1L20 & (D1L21);


--D1L143 is state:inst2|Select~3608
--operation mode is normal

D1L143 = D1L20 & (D1L142) # !D1L20 & (D1L142 & (E1_19) # !D1L142 & D1L4);


--D1_i[1] is state:inst2|i[1]
--operation mode is arithmetic

D1_i[1]_carry_eqn = D1L31;
D1_i[1]_lut_out = D1_i[1] $ (D1_i[1]_carry_eqn);
D1_i[1] = DFFEAS(D1_i[1]_lut_out, B1_Q, VCC, , D1L43, , , D1L39, );

--D1L33 is state:inst2|i[1]~720
--operation mode is arithmetic

D1L33 = CARRY(!D1L31 # !D1_i[1]);


--D1L6 is state:inst2|add~1195
--operation mode is arithmetic

D1L6_carry_eqn = D1L9;
D1L6 = D1_i[2] $ (!D1L6_carry_eqn);

--D1L7 is state:inst2|add~1197
--operation mode is arithmetic

D1L7 = CARRY(D1_i[2] & (!D1L9));


--C1_data_out[1] is ram:inst1|data_out[1]
--operation mode is normal

C1_data_out[1]_lut_out = D1_i[4] & C1L395 # !D1_i[4] & (C1L405);
C1_data_out[1] = DFFEAS(C1_data_out[1]_lut_out, clk, VCC, , , , , , );


--D1L144 is state:inst2|Select~3610
--operation mode is normal

D1L144 = D1L21 & (!D1L20) # !D1L21 & (D1L20 & (C1_data_out[1]) # !D1L20 & D1L6);


--D1L145 is state:inst2|Select~3611
--operation mode is normal

D1L145 = D1L21 & (D1L144 & (E1_18) # !D1L144 & D1_i[1]) # !D1L21 & (D1L144);


--C1_data_out[0] is ram:inst1|data_out[0]
--operation mode is normal

C1_data_out[0]_lut_out = D1_i[4] & C1L415 # !D1_i[4] & (C1L425);
C1_data_out[0] = DFFEAS(C1_data_out[0]_lut_out, clk, VCC, , , , , , );


--D1_i[0] is state:inst2|i[0]
--operation mode is arithmetic

D1_i[0]_lut_out = !D1_i[0];
D1_i[0] = DFFEAS(D1_i[0]_lut_out, B1_Q, VCC, , D1L43, , , D1L39, );

--D1L31 is state:inst2|i[0]~724
--operation mode is arithmetic

D1L31 = CARRY(D1_i[0]);


--D1L8 is state:inst2|add~1200
--operation mode is arithmetic