makefile

来自「leon3 patch for altera ep1c20 FPGA.」· 代码 · 共 30 行

GRLIB=../..
TOP=leon3mp
BOARD=altera-ep1c20
include $(GRLIB)/boards/$(BOARD)/Makefile.inc
DEVICE=$(PART)-$(PACKAGE)$(SPEED)
UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
EFFORT=std
XSTOPT=
VHDLSYNFILES=config.vhd ahbrom.vhd smc_mctrl.vhd clkgen_ep1c20board.vhd leon3mp.vhd 
VHDLSIMFILES=testbench.vhd
SIMTOP=testbench
SDCFILE=$(GRLIB)/boards/$(BOARD)/default.sdc
BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
CLEAN=soft-clean

LIBSKIP = apa apa3 axcelerator ec unisim ihp25 ihp25rh \
	ut025crh virage rh_lib18t rh_lib18t_io2 pere05 cust1 atmel \
	artisan umc18 core1553bbc core1553brm core1553brt gr1553 corePCIF \
	tmtc openchip ihp gleichmann
DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan pci leon3ft ambatest can ddr
FILESKIP = grcan.vhd

include $(GRLIB)/software/leon3/Makefile
include $(GRLIB)/bin/Makefile


##################  project specific targets ##########################