leon3mp.ucf

LEON3 SOC GRlip IP core. Memory controller.

#NET "j5_24"  LOC =  W10; # J5 pin 24 - RIOB24
#   #"j5_25"  - GND
#NET "j5_26"  LOC =  Y9 ; # J5 pin 26 - RIOB26
#   #"j5_27"  - GND
#NET "j5_28"  LOC =  W9 ; # J5 pin 28 - RIOB28
#   #"j5_29"  - GND
#NET "j5_30"  LOC =  Y8 ; # J5 pin 30 - RIOB30
#   #"j5_31"  - GND
#NET "j5_32"  LOC =  W8 ; # J5 pin 32 - RIOB32
#   #"j5_33"  - GND
#NET "j5_34"  LOC =  Y7 ; # J5 pin 34 - RIOB34
#   #"j5_35"  - GND
#NET "j5_36"  LOC =  W7 ; # J5 pin 36 - RIOB36
#   #"j5_37"  - GND
#NET "j5_38"  LOC =  Y6 ; # J5 pin 38 - RIOB38
#   #"j5_39"  - GND
#NET "j5_40"  LOC =  W6 ; # J5 pin 40 - RIOB40
#
## J6 Connector
#   #"j6_1"  - Vin
#   #"j6_2"  - 3.3V
#   #"j6_3"  - 2.5V
#   #"j6_4"  - GND		   
#NET "j6_5"   LOC = AB16; # J6 pin 5 - RIOA4
#NET "j6_6"   LOC = AA17; # J6 pin 6 - RIOA3 - User LED
#NET "j6_7"   LOC = AA15; # J6 pin 7 - RIOA6
#NET "j6_8"   LOC = AB17; # J6 pin 8 - RIOA5
#NET "j6_9"   LOC = AB15; # J6 pin 9 - RIOA8
#NET "j6_10"  LOC =  W17; # J6 pin 10 - RIOA7
#NET "j6_11"  LOC = AA14; # J6 pin 11 - RIOA10
#NET "j6_12"  LOC =  Y17; # J6 pin 12 - RIOA9
#NET "j6_13"  LOC = AB14; # J6 pin 13 - RIOA12
#NET "j6_14"  LOC =  W16; # J6 pin 14 - RIOA11
#NET "j6_15"  LOC = AA13; # J6 pin 15 - RIOA14
#NET "j6_16"  LOC =  Y16; # J6 pin 16 - RIOA13
#NET "j6_17"  LOC = AB13; # J6 pin 17 - RIOA16
#NET "j6_18"  LOC =  V16; # J6 pin 18 - RIOA15
#NET "j6_19"  LOC = AA12; # J6 pin 19 - RIOA18
#NET "j6_20"  LOC =  W15; # J6 pin 20 - RIOA17
#NET "j6_21"  LOC = AB12; # J6 pin 21 - RIOA20
#NET "j6_22"  LOC =  V14; # J6 pin 22 - RIOA19
#NET "j6_23"  LOC = AB9 ; # J6 pin 23 - RIOA22
#NET "j6_24"  LOC =  U14; # J6 pin 24 - RIOA21
#NET "j6_25"  LOC = AA9 ; # J6 pin 25 - RIOA24
#NET "j6_26"  LOC =  U13; # J6 pin 26 - RIOA23
#NET "j6_27"  LOC = AB8 ; # J6 pin 27 - RIOA26
#NET "j6_28"  LOC =  U12; # J6 pin 28 - RIOA25
#NET "j6_29"  LOC = AA8 ; # J6 pin 29 - RIOA28
#NET "j6_30"  LOC =  U11; # J6 pin 30 - RIOA27
#NET "j6_31"  LOC = AB7 ; # J6 pin 31 - RIOA30
#NET "j6_32"  LOC =  U10; # J6 pin 32 - RIOA29
#NET "j6_33"  LOC = AA7 ; # J6 pin 33 - RIOA32
#NET "j6_34"  LOC =  U9 ; # J6 pin 34 - RIOA31
#NET "j6_35"  LOC = AB6 ; # J6 pin 35 - RIOA34
#NET "j6_36"  LOC =  V9 ; # J6 pin 36 - RIOA33
#NET "j6_37"  LOC = AA6 ; # J6 pin 37 - RIOA36
#NET "j6_38"  LOC =  V8 ; # J6 pin 38 - RIOA35
#NET "j6_39"  LOC = AB5 ; # J6 pin 39 - RIOA38
#NET "j6_40"  LOC =  V7 ; # J6 pin 40 - RIOA37


###################################################################
# P160 Communications module - Virtex-II V2MB1000 Development kit #
###################################################################

# 10/100 Ethernet
NET "erstn"    LOC =  K17; # JX1 pin B31 - LIOB31 - ETH_PHY_RESETn
NET "emdio"   LOC =  G22; # JX1 pin A13 - LIOA13 - ETH_MDIO
NET "emdc"    LOC =  G21; # JX1 pin B14 - LIOB14 - ETH_MDC
NET "erx_col"    LOC =  J20; # JX1 pin B24 - LIOB24 - ETH_COL
NET "erx_crs"    LOC =  J19; # JX1 pin B25 - LIOB25 - ETH_CRS
NET "etxd(0)"   LOC =  L20; # JX1 pin A21 - LIOA21 - ETH_TXD0
NET "etxd(1)"   LOC =  K18; # JX1 pin B22 - LIOB22 - ETH_TXD1
NET "etxd(2)"   LOC =  K20; # JX1 pin B23 - LIOB23 - ETH_TXD2
NET "etxd(3)"   LOC =  K19; # JX1 pin A23 - LIOA23 - ETH_TDX3
NET "etx_clk"    LOC =  C11; # JX1 pin A35 - LIOA35 - ETH_TXC
NET "etx_er"   LOC =  C21; # JX1 pin A19 - LIOA19 - ETH_TXER
NET "etx_en"   LOC =  L19; # JX1 pin B21 - LIOB21 - ETH_TXEN
NET "erxd(0)"   LOC =  E21; # JX1 pin B17 - LIOB17 - ETH_RXD0
NET "erxd(1)"   LOC =  E22; # JX1 pin B16 - LIOB16 - ETH_RXD1
NET "erxd(2)"   LOC =  F21; # JX1 pin A15 - LIOA15 - ETH_RXD2
NET "erxd(3)"   LOC =  F22; # JX1 pin B15 - LIOB15 - ETH_RXD3
NET "erx_clk"    LOC =  D11; # JX1 pin A33 - LIOA33 - ETH_RXC
NET "erx_er"   LOC =  C22; # JX1 pin B19 - LIOB19 - ETH_RXER
NET "erx_dv"   LOC =  D22; # JX1 pin A17 - LIOA17 - ETH_RXDV

# USB Port
NET "usb_vpo"    LOC =  L22; # JX1 pin B8  - LIOB8  - USB_VPO
NET "usb_vmo"    LOC =  L21; # JX1 pin B9  - LIOB9  - USB_VMO
NET "usb_oe"     LOC =  J21; # JX1 pin A11 - LIOA11 - USB_OEn
NET "usb_rcv"    LOC =  J22; # JX1 pin B11 - LIOB11 - USB_RCV
NET "usb_vp"     LOC =  K21; # JX1 pin B10 - LIOB10 - USB_VP
NET "usb_vm"     LOC =  K22; # JX1 pin A9  - LIOA9  - USB_VM

# RS232 Port
NET "rxd1" LOC =  H21; # JX1 pin B13 - LIOB13 - RS232_RX (to JP5 pin 2)
NET "txd1" LOC =  H22; # JX1 pin B12 - LIOB12 - RS232_TX (from JP5 pin 3)

# I2C Port
NET "i2c_data"   LOC =  J17; # JX1 pin B32 - LIOB32 - I2C_DATA (JP6 pin 1)
NET "i2c_clk"    LOC =  J18; # JX1 pin B33 - LIOB33 - I2C_CLK (JP6 pin 2)

# SPI Port
NET "spi_clk"    LOC =  F18; # JX1 pin B36 - LIOB36 - SPI_CLK (JP4 pin 1)
NET "spi_out"    LOC =  H18; # JX1 pin B34 - LIOB34 - SPI_OUT (JP4 pin 2)
NET "spi_in"     LOC =  G18; # JX1 pin B35 - LIOB35 - SPI_IN (JP4 pin 3)

# FLASH and SRAM
NET "address(0)"    LOC =  W8 ; # JX2 pin B32 - RIOB32 - A0
NET "address(1)"    LOC = AB6 ; # JX2 pin A34 - RIOA34 - A1
NET "address(2)"    LOC =  V8 ; # JX2 pin A35 - RIOA35 - A2
NET "address(3)"    LOC =  W7 ; # JX2 pin B36 - RIOB36 - A3
NET "address(4)"    LOC =  V9 ; # JX2 pin A33 - RIOA33 - A4
NET "address(5)"    LOC = AA6 ; # JX2 pin A36 - RIOA36 - A5
NET "address(6)"    LOC =  V7 ; # JX2 pin A37 - RIOA37 - A6
NET "address(7)"    LOC = AB5 ; # JX2 pin A38 - RIOA38 - A7
NET "address(8)"    LOC = AB10; # JX2 pin A1  - RIOA1  - A8
NET "address(9)"    LOC = AA17; # JX2 pin A3  - RIOA3  - A9
NET "address(10)"   LOC =  Y14; # JX2 pin B6  - RIOB6  - A10
NET "address(11)"   LOC =  Y15; # JX2 pin B2  - RIOB2  - A11
NET "address(12)"   LOC = AB16; # JX2 pin A4  - RIOA4  - A12
NET "address(13)"   LOC = AB17; # JX2 pin A5  - RIOA5  - A13
NET "address(14)"   LOC = AB15; # JX2 pin A8  - RIOA8  - A14
NET "address(15)"   LOC =  W14; # JX2 pin B4  - RIOB4  - A15
NET "address(16)"   LOC =  W13; # JX2 pin B8  - RIOB8  - A16
NET "address(17)"   LOC =  Y7 ; # JX2 pin B34 - RIOB34 - A17
NET "address(18)"   LOC =  Y6 ; # JX2 pin B38 - RIOB38 - A18
NET "address(19)"   LOC = AA16; # JX2 pin A2  - RIOA2  - A19
NET "address(20)"   LOC =  W6 ; # JX2 pin B40 - RIOB40 - A20
NET "address(21)"   LOC = AA15; # JX2 pin A6  - RIOA6  - A21
NET "address(22)"   LOC =  W17; # JX2 pin A7  - RIOA7  - A22
NET "data(0)"    LOC = AA12; # JX2 pin A18 - RIOA18 - D0
NET "data(1)"    LOC =  U14; # JX2 pin A21 - RIOA21 - D1
NET "data(2)"    LOC =  W15; # JX2 pin A17 - RIOA17 - D2
NET "data(3)"    LOC =  Y12; # JX2 pin B14 - RIOB14 - D3
NET "data(4)"    LOC =  Y16; # JX2 pin A13 - RIOA13 - D4
NET "data(5)"    LOC = AA13; # JX2 pin A14 - RIOA14 - D5
NET "data(6)"    LOC =  Y17; # JX2 pin A9  - RIOA9  - D6
NET "data(7)"    LOC =  W16; # JX2 pin A11 - RIOA11 - D7
NET "data(8)"    LOC =  V12; # JX2 pin B18 - RIOB18 - D8
NET "data(9)"    LOC = AB13; # JX2 pin A16 - RIOA16 - D9
NET "data(10)"   LOC =  W12; # JX2 pin B16 - RIOB16 - D10
NET "data(11)"   LOC =  V16; # JX2 pin A15 - RIOA15 - D11
NET "data(12)"   LOC = AB14; # JX2 pin A12 - RIOA12 - D12
NET "data(13)"   LOC =  Y13; # JX2 pin B10 - RIOB10 - D13
NET "data(14)"   LOC =  V13; # JX2 pin B12 - RIOB12 - D14
NET "data(15)"   LOC = AA14; # JX2 pin A10 - RIOA10 - D15
NET "data(16)"   LOC =  Y8 ; # JX2 pin B30 - RIOB30 - D16
NET "data(17)"   LOC = AA7 ; # JX2 pin A32 - RIOA32 - D17
NET "data(18)"   LOC =  W9 ; # JX2 pin B28 - RIOB28 - D18
NET "data(19)"   LOC =  U11; # JX2 pin A27 - RIOA27 - D19
NET "data(20)"   LOC =  Y9 ; # JX2 pin B26 - RIOB26 - D20
NET "data(21)"   LOC = AB8 ; # JX2 pin A26 - RIOA26 - D21
NET "data(22)"   LOC = AB9 ; # JX2 pin A22 - RIOA22 - D22
NET "data(23)"   LOC =  U13; # JX2 pin A23 - RIOA23 - D23
NET "data(24)"   LOC = AB7 ; # JX2 pin A30 - RIOA30 - D24
NET "data(25)"   LOC =  U9 ; # JX2 pin A31 - RIOA31 - D25
NET "data(26)"   LOC =  U10; # JX2 pin A29 - RIOA29 - D26
NET "data(27)"   LOC = AA8 ; # JX2 pin A28 - RIOA28 - D27
NET "data(28)"   LOC =  U12; # JX2 pin A25 - RIOA25 - D28
NET "data(29)"   LOC = AA9 ; # JX2 pin A24 - RIOA24 - D29
NET "data(30)"   LOC =  W10; # JX2 pin B24 - RIOB24 - D30
NET "data(31)"   LOC =  Y10; # JX2 pin B22 - RIOB22 - D31
NET "ramsn"   LOC = AB12; # JX2 pin A20 - RIOA20 - MEM.CE1Sn
NET "romsn"    LOC =  V10; # JX2 pin B20 - RIOB20 - MEM.CEFn
NET "oen"     LOC =  V14; # JX2 pin A19 - RIOA19 - MEM.OEn
NET "writen"     LOC = AA5 ; # JX2 pin A40 - RIOA40 - MEM.WEn
NET "mem_rdy"    LOC =  V6 ; # JX2 pin A39 - RIOA39 - MEM.RY/BY ???
NET "romrstn"    LOC =  E18; # JX1 pin B37 - LIOB37 - MEM_RESETn
NET "mben(0)"    LOC =  H19; # JX1 pin B26 - LIOB26 - MEM.BLBn
NET "mben(1)"    LOC =  G20; # JX1 pin B27 - LIOB27 - MEM.BUBn
NET "mben(2)"    LOC =  H20; # JX1 pin A25 - LIOA25 - MEM.ALBn
NET "mben(3)"    LOC =  G19; # JX1 pin A27 - LIOA27 - MEM.AUBn

# PS/2 Keybord Interface
NET "ps2_data"   LOC =  F20; # JX1 pin A29 - LIOA29 - PLD_KB_DATA (JP3 pin 1)
NET "ps2_clk"    LOC =  F19; # JX1 pin A31 - LIOA31 - PLD_KB_CLK	(JP3 pin 5)

# LCD Interface
NET "data(0)"    LOC = AA12; # JX2 pin A18 - RIOA18 - D0 (JP12 pin 8)
NET "data(1)"    LOC =  U14; # JX2 pin A21 - RIOA21 - D1 (JP12 pin 7)
NET "data(2)"    LOC =  W15; # JX2 pin A17 - RIOA17 - D2 (JP12 pin 6)
NET "data(3)"    LOC =  Y12; # JX2 pin B14 - RIOB14 - D3 (JP12 pin 5)
NET "data(4)"    LOC =  Y16; # JX2 pin A13 - RIOA13 - D4 (JP12 pin 4)
NET "data(5)"    LOC = AA13; # JX2 pin A14 - RIOA14 - D5 (JP12 pin 3)
NET "data(6)"    LOC =  Y17; # JX2 pin A9  - RIOA9  - D6 (JP12 pin 2)
NET "data(7)"    LOC =  W16; # JX2 pin A11 - RIOA11 - D7 (JP12 pin 1)
NET "lcd_en"     LOC =  E19; # JX1 pin B28 - LIOB28 - PLD_LCD_EN	(JP12 pin 9)
NET "lcd_rs"     LOC =  E20; # JX1 pin B29 - LIOB29 - PLD_LCD_RS	(JP12 pin 11)
NET "lcd_rw"     LOC =  L17; # JX1 pin B30 - LIOB30 - PLD_LCD_R/Wn (JP12 pin 10)

# ??? CoolRunner CPLD ???
NET "pld_clk0"    LOC =  A10; # JX1 pin B39 - LIOB39 - PLD_CLK2
NET "pld_clk2"    LOC =  B10; # JX1 pin B40 - LIOB40 - PLD_CLK0


NET erx_clk PERIOD = 40.000 ;
OFFSET = IN : 10.000 : BEFORE erx_clk ;
NET etx_clk PERIOD = 40.000 ;
OFFSET = OUT : 20.000 : AFTER etx_clk ;
OFFSET = IN : 8.000 : BEFORE etx_clk ;


NET "ddrsp0.ddrc/ddr_phy0/xc2v.ddr_phy0/rclk90b" TNM_NET = "rclk90b"; 
TIMEGRP "rclk270b_rise" = FALLING "rclk90b";
NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb";
TIMESPEC "TS_ddr_clk_fb" = PERIOD "ddr_clk_fb" 8.00 ns HIGH 50 %;

NET "clkm" 		 TNM_NET = "clkm";
NET "clkml" 		 TNM_NET = "clkml";
TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
NET "lock"  TIG;


#NET "ddrsp0.ddrc/ddr_phy0/xc2v.ddr_phy0/rclk270b" TNM_NET = "rclk270b"; 
#TIMEGRP "rclk270b_rise" = RISING "rclk270b";
TIMEGRP "clkml_rise" = RISING "clkml";
TIMESPEC "TS_rclk270b_clkml_rise" = FROM "rclk270b_rise" TO "clkml_rise" 3.500;