makefile

LEON3 SOC GRlip IP core. Memory controller.

GRLIB=../..
TOP=leon3mp
BOARD=memec-v2-mb1000
include $(GRLIB)/boards/$(BOARD)/Makefile.inc
DEVICE=$(PART)-$(PACKAGE)$(SPEED)
#UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
#UCF=$(GRLIB)/boards/$(BOARD)/leon3mp.ucf
UCF=leon3mp.ucf
QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
EFFORT=med
XSTOPT=-uc leon3mp.xcf
VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd
VHDLSIMFILES=testbench.vhd
SIMTOP=testbench
#SDCFILE=$(GRLIB)/boards/$(BOARD)/default.sdc
SDCFILE=default.sdc
BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
CLEAN=soft-clean

LIBSKIP = apa apa3 axcelerator ec altera_mf stratixii ihp25 ihp25rh \
	ut025crh virage rh_lib18t rh_lib18t_io2 pere05 cust1 atmel \
	artisan umc18 core1553bbc core1553brm core1553brt gr1553 corePCIF \
	tmtc openchip hynix ihp gleichmann opencores
DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan pci leon3ft ambatest can usb
FILESKIP = grcan.vhd

include $(GRLIB)/bin/Makefile
include $(GRLIB)/software/leon3/Makefile
#XLDFLAGS=-L./ lib3tests.a -Ttext=0x60000000


##################  project specific targets ##########################