📄 platform.h
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/* DO NOT EDIT!! - this file automatically generated * from .s file by awk -f s2h.awk *//***************************************************************************** * * Copyright (C) ARM Limited 1998. All rights reserved. * *****************************************************************************//************************************************************************ * * EVALUATOR7T address map * * NOTE: This is a multi-hosted header file for use with uHAL and * supported debuggers. * * ************************************************************************/#ifndef __address_h#define __address_h 1#define PLATFORM_ID 0x0062A/* Common modules for uHAL can be included or excluded by changing these * definitions. These can be over-ridden by the makefile/ARM project file * provided the .h file can is rebuilt. */#ifndef uHAL_BOOT#define uHAL_BOOT 0#endif#ifndef uHAL_TIMERS#define uHAL_TIMERS 1#endif#ifndef uHAL_INTERRUPTS#define uHAL_INTERRUPTS 1#endif#ifndef uHAL_COMPLEX_IRQ#define uHAL_COMPLEX_IRQ 1#endif#ifndef uHAL_PCI#define uHAL_PCI 0#endif#ifndef uHAL_HEAP#define uHAL_HEAP_BASE (SZ_256K + SZ_64K)#define uHAL_HEAP_SIZE (SZ_256K - SZ_32K)#define uHAL_HEAP 1#endif/* memory size *//* EVALUATOR7T has been fitted with 512K bytes of SRAM */#define uHAL_MEMORY_SIZE (SZ_512K)#define EVALUATOR_SSRAM_BASE (0)#define EVALUATOR_SSRAM_SIZE (SZ_512K)#define EVALUATOR_FLASH_BASE (0x01800000)#define EVALUATOR_FLASH_SIZE (SZ_512K)/* System Manager Group */#define SYSCFG 0x03FF0000#define EXTDBWTH (SYSCFG + 0x3010)#define ROMCON1 (SYSCFG + 0x3018)/* Interrupt Controller Group */#define INTMOD (SYSCFG + 0x4000)#define INTPND (SYSCFG + 0x4004)#define INTMSK (SYSCFG + 0x4008)#define MAXIRQNUM 21#define MAXFIQNUM 21#define MAXSWINUM 15#define NR_IRQS (MAXIRQNUM + 1)#define INT_TIMER0 (10)#define INT_TIMER1 (11)#define INT_GLOBAL (21)#define INT_UART0_TX (4)#define INT_UART0_RX (5)#define INT_UART1_TX (6)#define INT_UART1_RX (7)#define INT_UART1_TX_MASK (1 << INT_UART1_TX )#define INT_UART1_RX_MASK (1 << INT_UART1_RX )/* Timer stuff */#define OS_TIMER 1#define MAX_TIMER 2/* The irq numbers of the individual timers */#define TIMER_VECTORS { 0, INT_TIMER0, INT_TIMER1 }/* Timer Registers */#define TMOD (SYSCFG + 0x6000)#define TDATA0 (SYSCFG + 0x6004)#define TDATA1 (SYSCFG + 0x6008)/* Timer Mode Register bits */#define TMR_TE0 (1<<0)#define TMR_TMD0 (1<<1)#define TMR_TCLR0 (1<<2)#define TMR_TE1 (1<<3)#define TMR_TMD1 (1<<4)#define TMR_TCLR1 (1<<5)/* 50 MHz clock => 50,000 ticks / mSec * Max period is a bit larger than 85 s */#define mSEC_1 (0xC350)#define MAX_PERIOD (0xFFFFFFFF)/* LEDs *//* LEDs are accessed through the I/O Port * I/O Ports */#define IOPMOD (SYSCFG + 0x5000)#define IOPCON (SYSCFG + 0x5004)#define IOPDATA (SYSCFG + 0x5008)#define LED_BANK IOPDATA#define ALL_LEDS 0xF0#define uHAL_NUM_OF_LEDS 4#define uHAL_LED_MASKS { 0, 16, 32, 64, 128 }#define uHAL_LED_OFFSETS { 0, (void *)LED_BANK,(void *)LED_BANK,(void *)LED_BANK,(void *)LED_BANK }#ifndef HIGH#define HIGH 1#endif#define uHAL_LED_ON 1#define uHAL_LED_OFF 0/* UART */#define UART0_BASE (SYSCFG + 0xD000)#define UART1_BASE (SYSCFG + 0xE000) #define ULCON 0x00#define UCON 0x04#define USTAT 0x08#define UTXBUF 0x0C#define URXBUF 0x10#define UBRDIV 0x14/* * * Line Control Register bits * */#define ULCR8bits (3)#define ULCRS1StopBit (0)#define ULCRNoParity (0)/* * * UART Control Register bits * */#define UCRRxM (1)#define UCRRxSI (1 << 2)#define UCRTxM (1 << 3)#define UCRLPB (1 << 7)/* * * UART Status Register bits * */#define USROverrun (1 << 0)#define USRParity (1 << 1)#define USRFraming (1 << 2)#define USRBreak (1 << 3)#define USRDTR (1 << 4)#define USRRxData (1 << 5)#define USRTxHoldEmpty (1 << 6)#define USRTxEmpty (1 << 7)/* define it so that it only ever uses one port */#define HOST_COMPORT UART1_BASE#define SEMIHOSTED_COMPORT HOST_COMPORT#define OS_COMPORT HOST_COMPORT/* default baud rate value */#define BAUD_9600 (162 << 4)#define DEFAULT_OS_BAUD BAUD_9600/* UART registers are on word aligned, D8 * See lib/uart.c *//* Beware of side effects with IO_MAPADDRESS */#define IO_MAPADDRESS(a) (((0xFF & (unsigned int) (a)) << 2) | (0xFFFFFF00 & (unsigned int) (a)))#define _MapAddress(a) IO_MAPADDRESS(a)#define IO_READ(p) (*(unsigned *)(IO_MAPADDRESS(p)))#define IO_WRITE(p, c) (*(unsigned *)(IO_MAPADDRESS(p)) = c)/* UART primitives */#define GET_STATUS(p) (*(volatile unsigned *)((p) + USTAT))#define RX_DATA(s) ((s) & USRRxData)#define GET_CHAR(p) (*(volatile unsigned *)((p) + URXBUF))#define TX_READY(s) ((s) & USRTxHoldEmpty)#define PUT_CHAR(p,c) (*(unsigned *)((p) + UTXBUF) = (unsigned )(c)) /*************************************************************************//* SYSTEM MEMORY CONTROL REGISTER EQU TABLES *//*************************************************************************/#define fMCLK_MHz 50000000 /* 50MHz, KS32C50100 default */#define MHz 1000000⌨️ 快捷键说明
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