i2c.h

AVR,系列单片机MEGA48应用例程,包括原理图,代码基本包括全部资源的配置应用.

/************************************************************************************
Author: Ziva Dong
Start : 2003/02/10
End  : 2003/02/10
MCU : Mega8
Description: TWI(I2C) status define for working in Master mode and Slave mode
*************************************************************************************/
#define IAR_DEMO
#define START 0x08   
//MT --> Master transmitter mode;  MR --> Master receiver mode?#define START 0x08                   // A START condition has been transmitted
#define RE_START 0x10               // A repeated START condition has been transmitted
#define MT_ADDR_ACK 0x18           // SLA+W has been transmitted;ACK has been received
#define MT_ADDR_NOACK 0x20         // SLA+W has been transmitted;NOT ACK has been received
#define MT_DATA_ACK  0x28          // Data byte has been transmitted;ACK has been received
#define MT_DATA_NOACK 0x30        // Data byte has been transmitted;NOT ACK has been received

#define MR_ADDR_ACK  0x40         //SLA+R has been transmitted;ACK has been received
#define MR_ADDR_NOACK 0x48        //SLA+R has been transmitted;NOT ACK has been received
#define MR_DATA_ACK 0x50          //Data has been received;ACK has been returned
#define MR_DATA_NOACK 0x58        //Data has been received;NOT ACK has been returned

//ST --> Slave transmitter mode;  SR --> Slave receiver mode
#define ST_READCMD_ACK 0xa8       //Own SLA+R has been received;ACK has been returned
#define ST_DATA_ACK  0xb8          //Data byte in TWDR has been transmitted;ACK has been received
#define ST_DATA_NOACK 0xc0        //Data byte in TWDR has been transmitted;NOT ACK has been received
#define ST_LASTDATA_ACK  0xc8     //Last data byte in TWDR has been transmitted(TWEA = "0");ACK has been received

#define SR_WRITECMD_ACK  0x60     //Own SLA+W has been received;ACK has been returned
#define SR_DATA_ACK 0x80           //Previously addressed with own SLA+W;data has been received;ACK has been returned
#define SR_DATA_NOACK 0x88        //Previously addressed with own SLA+W;data has been received;NOT ACK has been returned
#define SR_STOP    0xa0             //A STOP condition or repeated START condition has been received while-->
#define SR_RESTART  0xa0           //still addressed asss slave
#define wr_device_add      0xa0
#define rd_device_add      0xa1

//the fllowing actions are for Master mode
#define Start()    	  (TWCR=(1<<TWINT)|(1<<TWSTA)|(1<<TWEN))
#define Stop()     	  (TWCR=(1<<TWINT)|(1<<TWSTO)|(1<<TWEN))
#define Wait()	   	  {while(!(TWCR&(1<<TWINT)));}
#define TestAck() 	  (TWSR&0xf8)
#define SetAck()	  (TWCR|=(1<<TWEA))
#define SetNoAck()    (TWCR&=~(1<<TWEA))
#define Twi()	  	  (TWCR=(1<<TWINT)|(1<<TWEN))
#define Write8Bit(x)  {TWDR=(x);TWCR=(1<<TWINT)|(1<<TWEN);} 
unsigned char i2c_Write(unsigned char Addr,unsigned char Write_Byte) ;
unsigned char i2c_Read(unsigned char Addr,unsigned char * Read_Byte)  ;     //this is a sample of reading 24c01(EEPROM)