📄 main.asm
字号:
;2006 01 08 tianke yundongkongzhika
*************************************************************
; Include header file:
.include "X24x.h"
; Step 1: Global declaration:
.global _c_int0, T1_ISR, PHANTOM, NMI_ISR,GISR2
.ref INIT_2407
; Variables declaration:
.bss ADC_RESULT,1
.bss LAST_RESULT,1
.bss PULSE_COUNT,1
.bss TEMP_COUNT,1
.page
******************************************************************
******
****** MAIN
******
******************************************************************
; Digital I/O registers
OCRA .set 7090h ; Output Control Reg A
OCRB .set 7092h ; Output Control Reg B
OCRC .set 7094h ; Output Control reg c
OPCRA .set 7090h ; Output Control Reg A
OPCRB .set 7092h ; Output Control Reg B
OPCRC .set 7094h ; Output Control reg c
PADATDIR .set 7098h ; I/O port A Data & Direction reg.
PBDATDIR .set 709Ah ; I/O port B Data & Direction reg.
PCDATDIR .set 709Ch ; I/O port C Data & Direction reg.
PDDATDIR .set 709Eh ; I/O port D Data & Direction reg.
PEDATDIR .set 7095h ; I/O port E Data & Direction reg.
PFDATDIR .set 7096h ; I/O port F Data & Direction reg.
GPTCON .set 7400h ; GP Timer control register.
T1CNT .set 7401h ; GP Timer 1 counter register.
T1CMPR .set 7402h ; GP Timer 1 compare register.
T1CMP .set 7402h
T1PR .set 7403h ; GP Timer 1 period register.
T1PER .set 7403h
T1CON .set 7404h ; GP Timer 1 control register.
T2CNT .set 7405h ; GP Timer 2 counter register.
T2CMPR .set 7406h ; GP Timer 2 compare register.
T2CMP .set 7406h
T2PR .set 7407h ; GP Timer 2 period register.
T2PER .set 7407h
T2CON .set 7408h ; GP Timer 2 control register.
T3CNT .set 7409h ; GP Timer 3 counter register. X240 only.
T3CMPR .set 740Ah ; GP Timer 3 compare register. X240 only.
T3CMP .set 740Ah
T3PR .set 740Bh ; GP Timer 3 period register. X240 only.
T3PER .set 740Bh
T3CON .set 740Ch ; GP Timer 3 control register. X240 only.
COMCON .set 7411h ; Compare control register.
ACTR .set 7413h ; Full compare action control register.
SACTR .set 7414h ; Simple compare action control register.
DBTCON .set 7415h ; Dead-band timer control register.
CMPR1 .set 7417h ; Full compare unit compare register1.
CMPR2 .set 7418h ; Full compare unit compare register2.
CMPR3 .set 7419h ; Full compare unit compare register3.
SCMPR1 .set 741Ah ; Single compare unit compare register1. X240 only.
SCMPR2 .set 741Bh ; Single compare unit compare register2. X240 only.
SCMPR3 .set 741Ch ; Single compare unit compare register3. X240 only.
CAPCON .set 7420h ; Capture control register.
CAPFIFO .set 7422h ; Capture FIFO status register.
FIFO1 .set 7423h ; Capture Channel 1 FIFO Top
FIFO2 .set 7424h ; Capture Channel 2 FIFO Top
FIFO3 .set 7425h ; Capture Channel 3 FIFO Top
FIFO4 .set 7426h ; Capture Channel 4 FIFO Top. X240 only.
CAP1FIFO .set 7423h ; Capture Channel 1 FIFO Top
CAP2FIFO .set 7424h ; Capture Channel 2 FIFO Top
CAP3FIFO .set 7425h ; Capture Channel 3 FIFO Top
CAP4FIFO .set 7426h ; Capture Channel 4 FIFO Top. X240 only.
EVIMRA .set 742Ch ; Group A Interrupt Mask Register
EVIMRB .set 742Dh ; Group B Interrupt Mask Register
EVIMRC .set 742Eh ; Group C Interrupt Mask Register
IMRA .set 742Ch ; Group A Interrupt Mask Register
IMRB .set 742Dh ; Group B Interrupt Mask Register
IMRC .set 742Eh ; Group C Interrupt Mask Register
EVIFRA .set 742Fh ; Group A Interrupt Flag Register
EVIFRB .set 7430h ; Group B Interrupt Flag Register
EVIFRC .set 7431h ; Group C Interrupt Flag Register
IFRA .set 742Fh ; Group A Interrupt Flag Register
IFRB .set 7430h ; Group B Interrupt Flag Register
IFRC .set 7431h ; Group C Interrupt Flag Register
EVIVRA .set 7432h ; Group A Int. Vector Register. X240 only.
EVIVRB .set 7433h ; Group B Int. Vector Register. X240 only.
EVIVRC .set 7434h ; Group C Int. Vector Register. X240 only.
BIT0 .set 000fh
BIT15 .set 0000h
.text
_c_int0:
_main:
;Load auxilary register AR7, stack pointer:
; LAR AR7, #stack_adr ; Point to B1 for Stack
CALL INIT_2407
CLRC INTM
LOOP:
;编码器portA: A0---ADCCS A1--ADCA0 A2--ADCR/C A3--ADCCE
;A0到A3均配置为输出口 #0F0Fh
LDP #0E1H
SPLK #0FF08h,PADATDIR
NOP
NOP
NOP
;IOPD0 为0则可以读取转换结果,如果为1继续等待
wait:
BIT PDDATDIR,BIT0
BCND wait,TC
LDP #0E1H
SPLK #0FF0Ch,PADATDIR
LACC PBDATDIR,8
ADD PCDATDIR
AND #0FFFH
SPLK #0FF0Fh,PADATDIR
MAR AR1
LDP #4H
LACC #1234H
LDP #4H
SACL ADC_RESULT
LDP #4H
LACC ADC_RESULT
LDP #4H
SPLK #1,ADC_RESULT
LDP #4H
LACC ADC_RESULT
LDP #4H
SPLK #2,LAST_RESULT
LACC LAST_RESULT
LDP #4H
SPLK #3,PULSE_COUNT
LACC PULSE_COUNT
LDP #4H
SPLK #3,TEMP_COUNT
LACC ADC_RESULT
LACC LAST_RESULT
LACC PULSE_COUNT
LACC TEMP_COUNT
;IOPB5,IOPB4配置为输出，IOPB0-IOPB3为输入
;IOPB5对应A脉冲，IOPB4对应B脉冲
LDP #0E1H
SPLK #3030H,PBDATDIR
; CALL calculate
b LOOP
RET
********************************************************************
**************计算前后两次AD采样后的数值差，得到脉冲数***************
********************************************************************
calculate:
CLRC C
LACC ADC_RESULT
SUB LAST_RESULT
BIT PULSE_COUNT,BIT15
BCND addloop,TC
SUB PULSE_COUNT
B savecount
addloop:
ADD PULSE_COUNT
savecount:
SACL PULSE_COUNT
BCND flag,NC
LACC PULSE_COUNT
OR #8000H
SACL PULSE_COUNT
flag:
LACC ADC_RESULT
SACL LAST_RESULT
ret
**********************************************************
* NMI ISR *
**********************************************************
NMI_ISR:
CLRC INTM ; re-enable maskable interrupts
RET ; return to main
****************************************************
* T1 ISR
****************************************************
GISR2: ;优先级INT2中断入口
;保存状态寄存器
;保护现场
; Step 5: Context saving.
LDP #0h
SPLK #0FFh, IFR ; Clear all Int Flags
LDP #0E8h
SPLK #0FFFFh,EVIFRA ;清EVA中断标志
LDP #0E1H
T1PINT_ISR: ;通用定时器1中断入口
LDP #DP_EV
SPLK #0,T1CNT
LDP #0E1H
CLRC INTM ;开总中断，因为一进中断就自动关闭总中断
RET
*********************************
;假中断程序
PHANTOM:
;复位看门狗
RET⌨️ 快捷键说明
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