dds.mdl

DDS的DSP实现

	  SourceBlock		  "bus_alteradspbuilder/Constant"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Signed Integer"
	  nodetype		  "Constant"
	  bwl			  "16"
	  bwr			  "8"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  ncstsamp		  "-1"
	  cst			  "0"
	  modulename		  "Constant"
	  nSgCpl		  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Delay"
	  Ports			  [1, 1]
	  Position		  [195, 265, 240, 315]
	  ForegroundColor	  "blue"
	  SourceBlock		  "store_alteradspbuilder/Delay"
	  SourceType		  "Delay AlteraBlockSet"
	  depth			  "1"
	  clken			  off
	  MaskValue		  "1"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Freqword"
	  Description		  "Sign Binary Fractionnal"
	  Ports			  [1, 1]
	  Position		  [80, 282, 145, 298]
	  ForegroundColor	  "blue"
	  SourceBlock		  "bus_alteradspbuilder/AltBus"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Signed Integer"
	  nodetype		  "Input Port"
	  bwl			  "32"
	  bwr			  "8"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  LocPin		  "any"
	  cst			  "0"
	  modulename		  "Freqword"
	  ppat			  "d:\\file_copy\\dspbd_demo\\myprj\\sinwave\\"
"DSPBuilder_subdds"
	  nSgCpl		  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "LUT"
	  Ports			  [1, 1]
	  Position		  [190, 386, 275, 424]
	  ForegroundColor	  "blue"
	  SourceBlock		  "gate_alteradspbuilder/LUT"
	  SourceType		  "LUT  AlteraBlockSet"
	  BusType		  "Signed Integer"
	  bwl			  "10"
	  bwr			  "10"
	  bwaddr		  "10"
	  MatlabArray		  "511*sin( [0:2*pi/(2^10):2*pi] )"
	  LocPin		  "dds_SubDDS_LUT"
	  lpm			  on
	  modulename		  "d:\\matlab6\\work\\gw48_sopc_1c6_demo\\dds_"
"l\\DSPBuilder_dds\\dds_SubDDS_LUT.lut"
	  pipeline		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "Parallel \nAdder Subtractor"
	  Ports			  [2, 1]
	  Position		  [300, 236, 360, 294]
	  ForegroundColor	  "blue"
	  SourceBlock		  "arithm_alteradspbuilder/Parallel \nAdder Su"
"btractor"
	  SourceType		  "Sum AlteraBlockSet"
	  Inputs		  "2"
	  direction		  "++"
	  pipeline		  on
	  clken			  off
	  MaskValue		  "1"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Parallel \nAdder Subtractor1"
	  Ports			  [2, 1]
	  Position		  [580, 221, 640, 279]
	  ForegroundColor	  "blue"
	  SourceBlock		  "arithm_alteradspbuilder/Parallel \nAdder Su"
"btractor"
	  SourceType		  "Sum AlteraBlockSet"
	  Inputs		  "2"
	  direction		  "++"
	  pipeline		  off
	  clken			  off
	  MaskValue		  "1"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Product1"
	  Ports			  [2, 1]
	  Position		  [325, 394, 390, 436]
	  ForegroundColor	  "blue"
	  SourceBlock		  "arithm_alteradspbuilder/Product"
	  SourceType		  "Product Altera BlockSet"
	  pipeline		  "2"
	  lpm			  on
	  eab			  off
	  clken			  off
	  MaskValue		  "1"
	}
	Block {
	  BlockType		  Reference
	  Name			  "amp"
	  Description		  "Sign Binary Fractionnal"
	  Ports			  [1, 1]
	  Position		  [195, 477, 260, 493]
	  ForegroundColor	  "blue"
	  SourceBlock		  "bus_alteradspbuilder/AltBus"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Unsigned Integer"
	  nodetype		  "Input Port"
	  bwl			  "8"
	  bwr			  "8"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  LocPin		  "any"
	  cst			  "0"
	  modulename		  "amp"
	  ppat			  "d:\\file_copy\\dspbd_demo\\myprj\\sinwave\\"
"DSPBuilder_subdds"
	  nSgCpl		  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "ddsout2"
	  Description		  "Sign Binary Fractionnal"
	  Ports			  [1, 1]
	  Position		  [570, 407, 635, 423]
	  ForegroundColor	  "blue"
	  SourceBlock		  "bus_alteradspbuilder/AltBus"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Signed Integer"
	  nodetype		  "Output Port"
	  bwl			  "10"
	  bwr			  "8"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  LocPin		  "any"
	  cst			  "0"
	  modulename		  "ddsout2"
	  ppat			  "d:\\file_copy\\dspbd_demo\\myprj\\sinwave\\"
"DSPBuilder_subdds"
	  nSgCpl		  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "phaseword"
	  Description		  "Sign Binary Fractionnal"
	  Ports			  [1, 1]
	  Position		  [80, 167, 145, 183]
	  ForegroundColor	  "blue"
	  SourceBlock		  "bus_alteradspbuilder/AltBus"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Signed Integer"
	  nodetype		  "Input Port"
	  bwl			  "16"
	  bwr			  "8"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  LocPin		  "any"
	  cst			  "0"
	  modulename		  "phaseword"
	  ppat			  "d:\\file_copy\\dspbd_demo\\myprj\\sinwave\\"
"DSPBuilder_subdds"
	  nSgCpl		  "0"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1[9:0]"
	  Position		  [660, 408, 690, 422]
	}
	Line {
	  SrcBlock		  "Freqword"
	  SrcPort		  1
	  DstBlock		  "Delay"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Delay"
	  SrcPort		  1
	  Points		  [20, 0; 0, -10]
	  DstBlock		  "Parallel \nAdder Subtractor"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Parallel \nAdder Subtractor"
	  SrcPort		  1
	  DstBlock		  "AltBus"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "AltBus"
	  SrcPort		  1
	  Points		  [0, 0; 25, 0]
	  Branch {
	    Points		    [0, -55; -220, 0; 0, 40]
	    DstBlock		    "Parallel \nAdder Subtractor"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Parallel \nAdder Subtractor1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Parallel \nAdder Subtractor1"
	  SrcPort		  1
	  Points		  [70, 0; 0, 95; -670, 0; 0, 60]
	  DstBlock		  "BusConversion2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "BusConversion2"
	  SrcPort		  1
	  DstBlock		  "LUT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "LUT"
	  SrcPort		  1
	  DstBlock		  "Product1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "amp"
	  SrcPort		  1
	  Points		  [25, 0; 0, -60]
	  DstBlock		  "Product1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Product1"
	  SrcPort		  1
	  DstBlock		  "BusConversion3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "BusConversion3"
	  SrcPort		  1
	  DstBlock		  "ddsout2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "P[15:0]"
	  SrcPort		  1
	  DstBlock		  "phaseword"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "F[31:0]"
	  SrcPort		  1
	  DstBlock		  "Freqword"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ddsout2"
	  SrcPort		  1
	  DstBlock		  "Out1[9:0]"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "A[7:0]"
	  SrcPort		  1
	  DstBlock		  "amp"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "BusConcatenation"
	  SrcPort		  1
	  Points		  [45, 0; 0, 75]
	  DstBlock		  "Parallel \nAdder Subtractor1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "phaseword"
	  SrcPort		  1
	  Points		  [95, 0; 0, -25]
	  DstBlock		  "BusConcatenation"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  Points		  [30, 0; 0, -20]
	  DstBlock		  "BusConcatenation"
	  DstPort		  2
	}
	Annotation {
	  Position		  [624, 491]
	}
      }
    }
    Line {
      SrcBlock		      "AMP1"
      SrcPort		      1
      DstBlock		      "SubDDS"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant1"
      SrcPort		      1
      DstBlock		      "FREQWORD"
      DstPort		      1
    }
    Line {
      SrcBlock		      "FREQWORD1"
      SrcPort		      1
      DstBlock		      "SubDDS"
      DstPort		      2
    }
    Line {
      SrcBlock		      "FREQWORD"
      SrcPort		      1
      DstBlock		      "BusConcatenation1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant4"
      SrcPort		      1
      Points		      [30, 0; 0, -35]
      DstBlock		      "BusConcatenation1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "BusConcatenation1"
      SrcPort		      1
      Points		      [0, 45; -70, 0; 0, 85]
      DstBlock		      "BusConcatenation6"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Constant7"
      SrcPort		      1
      Points		      [0, 50]
      DstBlock		      "AMP1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "DDSOUT"
      SrcPort		      1
      Points		      [10, 0]
      Branch {
	Points			[0, -35; -120, 0; 0, -45]
	DstBlock		"BusConversion1"
	DstPort			1
      }
      Branch {
	DstBlock		"Scope"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "BusConversion"
      SrcPort		      1
      DstBlock		      "BusConcatenation"
      DstPort		      2
    }
    Line {
      SrcBlock		      "ExtractBit"
      SrcPort		      1
      DstBlock		      "NOT"
      DstPort		      1
    }
    Line {
      SrcBlock		      "NOT"
      SrcPort		      1
      Points		      [10, 0; 0, 35]
      DstBlock		      "BusConcatenation"
      DstPort		      1
    }
    Line {
      SrcBlock		      "SinOut1"
      SrcPort		      1
      Points		      [0, 0; 15, 0]
      Branch {
	Points			[0, 30]
	DstBlock		"BusConversion"
	DstPort			1
      }
      Branch {
	Points			[0, -30]
	DstBlock		"ExtractBit"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "BusConcatenation"
      SrcPort		      1
      Points		      [30, 0; 0, -95; -230, 0; 0, -175]
      DstBlock		      "DDSOUT"
      DstPort		      1
    }
    Line {
      SrcBlock		      "SubDDS"
      SrcPort		      1
      Points		      [25, 0]
      Branch {
	Points			[0, 195; -125, 0; 0, 70]
	DstBlock		"SinOut1"
	DstPort			1
      }
      Branch {
	Points			[0, -45]
	DstBlock		"Scope1"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Constant2"
      SrcPort		      1
      Points		      [0, -25]
      DstBlock		      "AMPlify"
      DstPort		      1
    }
    Line {
      SrcBlock		      "BusConcatenation6"
      SrcPort		      1
      DstBlock		      "FREQWORD1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant6"
      SrcPort		      1
      Points		      [15, 0; 0, 15]
      DstBlock		      "BusConcatenation6"
      DstPort		      1
    }
    Line {
      SrcBlock		      "AMPlify"
      SrcPort		      1
      DstBlock		      "SubDDS"
      DstPort		      3
    }
    Line {
      SrcBlock		      "BusConversion1"
      SrcPort		      1
      DstBlock		      "DA_DATA"
      DstPort		      1
    }
    Line {
      SrcBlock		      "DA_DATA"
      SrcPort		      1
      Points		      [10, 0; 0, 35; -65, 0; 0, 25]
      DstBlock		      "Scope"
      DstPort		      1
    }
    Line {
      SrcBlock		      "GND"
      SrcPort		      1
      DstBlock		      "DA_CS"
      DstPort		      1
    }
    Annotation {
      Name		      "直接数字综合器"
      Position		      [686, 95]
      ForegroundColor	      "blue"
      FontName		      "Arial"
      FontSize		      14
      FontWeight	      "bold"
    }
  }
}