subddsaltblk.xml

DDS的DSP实现

            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>Constant</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>ParallelAdderSubtractor1</dstblk>
         </port_db>
         <nparameter>4</nparameter>
      </db_block>
      <db_block>
         <instancename>Product1</instancename>
         <sourcename>ProductAlteraBlockSet</sourcename>
         <instancenumber>9</instancenumber>
         <inport>2</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>pipeline</pname>
            <pvalue>2</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
            <pname>eab</pname>
            <pvalue>off</pvalue>
            <pname>lpm</pname>
            <pvalue>on</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>LUT</srcblk>
            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>amp</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>BusConversion3</dstblk>
         </port_db>
         <nparameter>6</nparameter>
      </db_block>
      <db_block>
         <instancename>ParallelAdderSubtractor</instancename>
         <sourcename>SumAlteraBlockSet</sourcename>
         <instancenumber>10</instancenumber>
         <inport>2</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>direction</pname>
            <pvalue>++</pvalue>
            <pname>pipeline</pname>
            <pvalue>on</pvalue>
            <pname>Inputs</pname>
            <pvalue>2</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>AltBus</srcblk>
            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>Delay</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>AltBus</dstblk>
         </port_db>
         <nparameter>6</nparameter>
      </db_block>
      <db_block>
         <instancename>ParallelAdderSubtractor1</instancename>
         <sourcename>SumAlteraBlockSet</sourcename>
         <instancenumber>11</instancenumber>
         <inport>2</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>direction</pname>
            <pvalue>++</pvalue>
            <pname>pipeline</pname>
            <pvalue>off</pvalue>
            <pname>Inputs</pname>
            <pvalue>2</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>BusConcatenation</srcblk>
            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>AltBus</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>BusConversion2</dstblk>
         </port_db>
         <nparameter>6</nparameter>
      </db_block>
      <db_block>
         <instancename>LUT</instancename>
         <sourcename>LUTAlteraBlockSet</sourcename>
         <instancenumber>12</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>BusType</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>bwl</pname>
            <pvalue>10</pvalue>
            <pname>bwr</pname>
            <pvalue>10</pvalue>
            <pname>bwaddr</pname>
            <pvalue>10</pvalue>
            <pname>pipeline</pname>
            <pvalue>off</pvalue>
            <pname>lpm</pname>
            <pvalue>on</pvalue>
            <pname>LocPin</pname>
            <pvalue>dds_SubDDS_LUT</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>BusConversion2</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>Product1</dstblk>
         </port_db>
         <nparameter>8</nparameter>
      </db_block>
      <db_block>
         <instancename>BusConversion2</instancename>
         <sourcename>SubBusAlteraBlockSet</sourcename>
         <instancenumber>13</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>bwl</pname>
            <pvalue>32</pvalue>
            <pname>bwr</pname>
            <pvalue>8</pvalue>
            <pname>obwl</pname>
            <pvalue>10</pvalue>
            <pname>obwr</pname>
            <pvalue>0</pvalue>
            <pname>sat</pname>
            <pvalue>off</pvalue>
            <pname>rnd</pname>
            <pvalue>on</pvalue>
            <pname>Inputs</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>Outputs</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>msb</pname>
            <pvalue>31</pvalue>
            <pname>lsb</pname>
            <pvalue>22</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>ParallelAdderSubtractor1</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>LUT</dstblk>
         </port_db>
         <nparameter>11</nparameter>
      </db_block>
      <db_block>
         <instancename>BusConversion3</instancename>
         <sourcename>SubBusAlteraBlockSet</sourcename>
         <instancenumber>14</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>bwl</pname>
            <pvalue>18</pvalue>
            <pname>bwr</pname>
            <pvalue>8</pvalue>
            <pname>obwl</pname>
            <pvalue>10</pvalue>
            <pname>obwr</pname>
            <pvalue>0</pvalue>
            <pname>sat</pname>
            <pvalue>on</pvalue>
            <pname>rnd</pname>
            <pvalue>on</pvalue>
            <pname>Inputs</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>Outputs</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>msb</pname>
            <pvalue>17</pvalue>
            <pname>lsb</pname>
            <pvalue>8</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>Product1</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>ddsout2</dstblk>
         </port_db>
         <nparameter>11</nparameter>
      </db_block>
   </block_dspbuilder>
   <hierarchy_parameters BlackBox="0">
      <nBlock>14</nBlock>
   </hierarchy_parameters>
   <hierarchy_port>
      <hierarchy_inport>
         <inportvalue>1</inportvalue>
         <inportname>phaseword</inportname>
         <inportbtype>SignedInteger</inportbtype>
         <inportbwl>16</inportbwl>
         <inportbwr>8</inportbwr>
      </hierarchy_inport>
      <hierarchy_inport>
         <inportvalue>2</inportvalue>
         <inportname>Freqword</inportname>
         <inportbtype>SignedInteger</inportbtype>
         <inportbwl>32</inportbwl>
         <inportbwr>8</inportbwr>
      </hierarchy_inport>
      <hierarchy_inport>
         <inportvalue>3</inportvalue>
         <inportname>amp</inportname>
         <inportbtype>UnsignedInteger</inportbtype>
         <inportbwl>8</inportbwl>
         <inportbwr>8</inportbwr>
      </hierarchy_inport>
      <hierarchy_outport>
         <outportvalue>1</outportvalue>
         <outportname>ddsout2</outportname>
         <outportbtype>SignedInteger</outportbtype>
         <outportbwl>10</outportbwl>
         <outportbwr>8</outportbwr>
      </hierarchy_outport>
   </hierarchy_port>
</SubDDS>