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📄 ddsaltblk.xml

📁 DDS的DSP实现
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            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>2</dstport>            <dstblk>SubDDS</dstblk>         </port_db>         <nparameter>9</nparameter>      </db_block>      <db_block>         <instancename>SinOut1</instancename>         <sourcename>AltBusAlteraBlockSet</sourcename>         <instancenumber>11</instancenumber>         <inport>1</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>nodetype</pname>            <pvalue>InternalNode</pvalue>            <pname>bwl</pname>            <pvalue>10</pvalue>            <pname>bwr</pname>            <pvalue>8</pvalue>            <pname>sgn</pname>            <pvalue>SignedInteger</pvalue>            <pname>sat</pname>            <pvalue>off</pvalue>            <pname>rnd</pname>            <pvalue>off</pvalue>            <pname>cst</pname>            <pvalue>0</pvalue>            <pname>LocPin</pname>            <pvalue>any</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>SubDDS</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>2</outportfanout>            <dstport>1</dstport>            <dstblk>ExtractBit</dstblk>            <dstport>1</dstport>            <dstblk>BusConversion</dstblk>         </port_db>         <nparameter>9</nparameter>      </db_block>      <db_block>         <instancename>ExtractBit</instancename>         <sourcename>ExtractBitAlteraBlockSet</sourcename>         <instancenumber>12</instancenumber>         <inport>1</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>bwl</pname>            <pvalue>10</pvalue>            <pname>bwr</pname>            <pvalue>0</pvalue>            <pname>Outputs</pname>            <pvalue>9</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>SinOut1</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>1</dstport>            <dstblk>NOT</dstblk>         </port_db>         <nparameter>4</nparameter>      </db_block>      <db_block>         <instancename>BusConcatenation</instancename>         <sourcename>BusConcatenationAlteraBlockSet</sourcename>         <instancenumber>13</instancenumber>         <inport>2</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>blean</pname>            <pvalue>off</pvalue>            <pname>bwl</pname>            <pvalue>1</pvalue>            <pname>bwr</pname>            <pvalue>9</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>NOT</srcblk>            <srcport>1</srcport>            <inportpos>2</inportpos>            <srcblk>BusConversion</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>1</dstport>            <dstblk>DDSOUT</dstblk>         </port_db>         <nparameter>4</nparameter>      </db_block>      <db_block>         <instancename>BusConcatenation1</instancename>         <sourcename>BusConcatenationAlteraBlockSet</sourcename>         <instancenumber>14</instancenumber>         <inport>2</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>blean</pname>            <pvalue>off</pvalue>            <pname>bwl</pname>            <pvalue>8</pvalue>            <pname>bwr</pname>            <pvalue>15</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>FREQWORD</srcblk>            <srcport>1</srcport>            <inportpos>2</inportpos>            <srcblk>Constant4</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>2</dstport>            <dstblk>BusConcatenation6</dstblk>         </port_db>         <nparameter>4</nparameter>      </db_block>      <db_block>         <instancename>BusConcatenation6</instancename>         <sourcename>BusConcatenationAlteraBlockSet</sourcename>         <instancenumber>15</instancenumber>         <inport>2</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>blean</pname>            <pvalue>off</pvalue>            <pname>bwl</pname>            <pvalue>9</pvalue>            <pname>bwr</pname>            <pvalue>23</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>Constant6</srcblk>            <srcport>1</srcport>            <inportpos>2</inportpos>            <srcblk>BusConcatenation1</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>1</dstport>            <dstblk>FREQWORD1</dstblk>         </port_db>         <nparameter>4</nparameter>      </db_block>      <db_block>         <instancename>NOT</instancename>         <sourcename>LogiBitAlteraBlockSet</sourcename>         <instancenumber>16</instancenumber>         <inport>1</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>Inputs</pname>            <pvalue>2</pvalue>            <pname>Operator</pname>            <pvalue>NOT</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>ExtractBit</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>1</dstport>            <dstblk>BusConcatenation</dstblk>         </port_db>         <nparameter>3</nparameter>      </db_block>      <db_block>         <instancename>BusConversion</instancename>         <sourcename>SubBusAlteraBlockSet</sourcename>         <instancenumber>17</instancenumber>         <inport>1</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>bwl</pname>            <pvalue>10</pvalue>            <pname>bwr</pname>            <pvalue>8</pvalue>            <pname>obwl</pname>            <pvalue>9</pvalue>            <pname>obwr</pname>            <pvalue>0</pvalue>            <pname>sat</pname>            <pvalue>off</pvalue>            <pname>rnd</pname>            <pvalue>off</pvalue>            <pname>Inputs</pname>            <pvalue>SignedInteger</pvalue>            <pname>Outputs</pname>            <pvalue>SignedInteger</pvalue>            <pname>msb</pname>            <pvalue>8</pvalue>            <pname>lsb</pname>            <pvalue>0</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>SinOut1</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>2</dstport>            <dstblk>BusConcatenation</dstblk>         </port_db>         <nparameter>11</nparameter>      </db_block>      <db_block>         <instancename>BusConversion1</instancename>         <sourcename>SubBusAlteraBlockSet</sourcename>         <instancenumber>18</instancenumber>         <inport>1</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>            <pname>bwl</pname>            <pvalue>10</pvalue>            <pname>bwr</pname>            <pvalue>8</pvalue>            <pname>obwl</pname>            <pvalue>8</pvalue>            <pname>obwr</pname>            <pvalue>0</pvalue>            <pname>sat</pname>            <pvalue>off</pvalue>            <pname>rnd</pname>            <pvalue>off</pvalue>            <pname>Inputs</pname>            <pvalue>UnsignedInteger</pvalue>            <pname>Outputs</pname>            <pvalue>UnsignedInteger</pvalue>            <pname>msb</pname>            <pvalue>9</pvalue>            <pname>lsb</pname>            <pvalue>2</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>DDSOUT</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>1</dstport>            <dstblk>DA_DATA</dstblk>         </port_db>         <nparameter>11</nparameter>      </db_block>      <db_block>         <instancename>SubDDS</instancename>         <sourcename>SubSystemAlteraBlockSet</sourcename>         <instancenumber>19</instancenumber>         <inport>3</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>         </parameters_db>         <port_db>            <inportpos>1</inportpos>            <srcblk>AMP1</srcblk>            <srcport>1</srcport>            <inportpos>2</inportpos>            <srcblk>FREQWORD1</srcblk>            <srcport>1</srcport>            <inportpos>3</inportpos>            <srcblk>AMPlify</srcblk>            <srcport>1</srcport>            <outportpos>1</outportpos>            <outportfanout>2</outportfanout>            <dstport>1</dstport>            <dstblk>Scope1</dstblk>            <dstport>1</dstport>            <dstblk>SinOut1</dstblk>         </port_db>         <nparameter>1</nparameter>      </db_block>      <db_block>         <instancename>GND</instancename>         <sourcename>SGNDAlteraBlockSet</sourcename>         <instancenumber>20</instancenumber>         <inport>0</inport>         <outport>1</outport>         <parameters_db>            <pname>CompiledSampleTime</pname>            <pvalue>0</pvalue>         </parameters_db>         <port_db>            <outportpos>1</outportpos>            <outportfanout>1</outportfanout>            <dstport>1</dstport>            <dstblk>DA_CS</dstblk>         </port_db>         <nparameter>1</nparameter>      </db_block>   </block_dspbuilder>   <top_subsystem>      <design_subsystem>SubDDS</design_subsystem>   </top_subsystem>   <top_parameters>      <starttime>0.0</starttime>      <stoptime>5.0</stoptime>      <nsubsystem>1</nsubsystem>      <nblocks>20</nblocks>      <bContainOpenCorePlus>0</bContainOpenCorePlus>   </top_parameters>   <top_signalcompiler>      <family>Cyclone</family>      <opt>Speed</opt>      <synthtool>Others</synthtool>      <vstim>on</vstim>      <SynthAct>None</SynthAct>      <workdir>d:\matlab6\work\gw48_sopc_1c6_demo\dds_l</workdir>      <Procetype>prod</Procetype>      <UseReset>on</UseReset>      <ResetPin>Active High</ResetPin>      <ClockPin>Keep Internal</ClockPin>      <ClockPeriod>10</ClockPeriod>      <UseSignalTap>off</UseSignalTap>      <CreatePtfFile>off</CreatePtfFile>      <SignalTapDepth>128</SignalTapDepth>   </top_signalcompiler></dds>

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