📄 dm9sw.c
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if(!(val = check_rx_ready(rxbyte))) break; /* A packet ready now & Get status/length */ outb(DM9KS_MRCMD, db->io_addr); /* Read packet status & length */ db->MoveData(db,ptr,4,0); /* Packet status check */ if (rx_desc.desc.status & 0xbf) { db->stats.rx_errors++; if (rx_desc.desc.status & RX_FIFO_over) db->stats.rx_fifo_errors++; if (rx_desc.desc.status & RX_CRCErr) db->stats.rx_crc_errors++; //drop this packet db->MoveData(db, NULL, rx_desc.desc.length, 0); db->stats.rx_dropped++; goto rx_next; } skb = dev_alloc_skb(rx_desc.desc.length+4); if (skb == NULL ) { printk(KERN_INFO "%s: Memory squeeze.\n", dev->name); /*re-load the value into Memory data read address register*/ iow(db,DM9KS_MDRAH,MDRAH); iow(db,DM9KS_MDRAL,MDRAL); }else{ /* Move data from DM9000 */ skb->dev = dev; skb_reserve(skb, 2); rdptr = (u8*)skb_put(skb, rx_desc.desc.length - 4); db->MoveData(db, rdptr, rx_desc.desc.length, 0); /* Pass to upper layer */ skb->protocol = eth_type_trans(skb,dev);#if defined(CHECKSUM) if (!(rx_desc.desc.rxbyte & 0xe0)) skb->ip_summed = CHECKSUM_UNNECESSARY;#endif netif_rx(skb); dev->last_rx=jiffies; db->stats.rx_packets++; db->stats.rx_bytes += rx_desc.desc.length; rx++; }rx_next: if (!rx_work--) break; }//end of while() dev->quota -= rx; *budget -= rx; /* if we did not reach work limit, then we're done with * this round of polling */ if (rx_work) { if (ior(db, DM9KS_ISR) & ISR_RX_coming) goto rx_status_loop; local_irq_disable(); iow(db, DM9KS_IMR, DM9KS_REGFF); __netif_rx_complete(dev); local_irq_enable(); return 0;/* done */ } return 1;/* not done */ }#endif/* Get statistics from driver.*/static struct net_device_stats * dmfe_get_stats(struct net_device *dev){ board_info_t *db = (board_info_t *)dev->priv; DMFE_DBUG(0, "dmfe_get_stats", 0); return &db->stats;}/* Process the upper socket ioctl command*/static int dmfe_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd){ DMFE_DBUG(0, "dmfe_do_ioctl()", 0); return 0;}/* Our watchdog timed out. Called by the networking layer */static voiddmfe_timeout(struct net_device *dev){ board_info_t *db = (board_info_t *)dev->priv; DMFE_DBUG(0, "dmfe_TX_timeout()", 0); //printk("TX time-out -- dmfe_timeout().\n"); db->reset_tx_timeout++; db->stats.tx_errors++;#if FALSE printk("TX packet count = %d\n", db->tx_pkt_cnt); printk("TX timeout = %d\n", db->reset_tx_timeout); printk("22H=0x%02x 23H=0x%02x\n",ior(db,0x22),ior(db,0x23)); printk("faH=0x%02x fbH=0x%02x\n",ior(db,0xfa),ior(db,0xfb));#endif dmfe_reset(dev); }static void dmfe_reset(struct net_device * dev){ board_info_t *db = (board_info_t *)dev->priv; u8 reg_save; /* Save previous register address */ reg_save = inb(db->io_addr); netif_stop_queue(dev); db->reset_counter++; dmfe_init_dm9000(dev); netif_wake_queue(dev); /* Restore previous register address */ outb(reg_save, db->io_addr);}/* A periodic timer routine*/static void dmfe_timer(unsigned long data){ struct net_device * dev = (struct net_device *)data; board_info_t *db = (board_info_t *)dev->priv; DMFE_DBUG(0, "dmfe_timer()", 0); /* Set timer again */ db->timer.expires = DMFE_TIMER_WUT; add_timer(&db->timer); return;}#ifndef NAPI/* * Received a packet and pass to upper layer */static void dmfe_packet_receive(struct net_device *dev){ board_info_t *db = (board_info_t *)dev->priv; struct sk_buff *skb; u8 rxbyte, val; u16 MDRAH, MDRAL; rx_t rx; u8 * ptr = (u8*)℞ u8* rdptr; DMFE_DBUG(0, "dmfe_packet_receive()", 0); do { /*store the value of Memory Data Read address register*/ MDRAH=ior(db, DM9KS_MDRAH); MDRAL=ior(db, DM9KS_MDRAL); rxbyte =ior(db, DM9KS_MRCMDX); rxbyte =ior(db, DM9KS_ISR); /* Dummy read */ rxbyte =ior(db, DM9KS_MRCMDX); /* read the byte of packet ready */ /* packet ready to receive check */ if(!(val = check_rx_ready(rxbyte))) break; /* A packet ready now & Get status/length */ outb(DM9KS_MRCMD, db->io_addr); /* Read packet status & length */ db->MoveData(db,ptr,4,0); /* Packet status check */ if (rx.desc.status & 0xbf) { //printk("DM9013:RX ERROR\n"); db->stats.rx_errors++; if (rx.desc.status & RX_FIFO_over) db->stats.rx_fifo_errors++; if (rx.desc.status & RX_CRCErr) db->stats.rx_crc_errors++; //drop this packet db->MoveData(db, NULL, rx.desc.length, 0); db->stats.rx_dropped++; continue; } skb = dev_alloc_skb(rx.desc.length+4); if (skb == NULL ) { printk(KERN_INFO "%s: Memory squeeze.\n", dev->name); /*re-load the value into Memory data read address register*/ iow(db,DM9KS_MDRAH,MDRAH); iow(db,DM9KS_MDRAL,MDRAL); return; } else { /* Move data from DM9000 */ skb->dev = dev; skb_reserve(skb, 2); rdptr = (u8*)skb_put(skb, rx.desc.length - 4); db->MoveData(db, rdptr, rx.desc.length, 0); /* Pass to upper layer */ skb->protocol = eth_type_trans(skb,dev);#if defined(CHECKSUM) if (val == 0x01) skb->ip_summed = CHECKSUM_UNNECESSARY;#endif netif_rx(skb); dev->last_rx=jiffies; db->stats.rx_packets++; db->stats.rx_bytes += rx.desc.length; db->cont_rx_pkt_cnt++; } }while((rxbyte & 0x01) == DM9KS_PKT_RDY); DMFE_DBUG(0, "[END]dmfe_packet_receive()", 0); }#endif/* * Read a word data from SROM */static u16 read_srom_word(board_info_t *db, int offset){ iow(db, DM9KS_EPAR, offset); iow(db, DM9KS_EPCR, EPCR_Read); udelay(200); iow(db, DM9KS_EPCR, 0x0); return (ior(db, DM9KS_EPDRL) + (ior(db, DM9KS_EPDRH) << 8) );}/* Set DM9000A/DM9010 multicast address*/static void dm9000_hash_table(struct net_device *dev){ board_info_t *db = (board_info_t *)dev->priv; struct dev_mc_list *mcptr = dev->mc_list; int mc_cnt = dev->mc_count; u32 hash_val; u16 i, oft, hash_table[4]; DMFE_DBUG(0, "dm9000_hash_table()", 0); /* Set Node address */ for (i = 0, oft = 0x10; i < 6; i++, oft++) iow(db, oft, dev->dev_addr[i]); /* Clear Hash Table */ for (i = 0; i < 4; i++) hash_table[i] = 0x0; /* broadcast address */ hash_table[3] = 0x8000; /* the multicast address in Hash Table : 64 bits */ for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { hash_val = cal_CRC((char *)mcptr->dmi_addr, 6, 0) & 0x3f; hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); } /* Write the hash table to MAC MD table */ for (i = 0, oft = 0x16; i < 4; i++) { iow(db, oft++, hash_table[i] & 0xff); iow(db, oft++, (hash_table[i] >> 8) & 0xff); }}/* Calculate the CRC valude of the Rx packet flag = 1 : return the reverse CRC (for the received packet CRC) 0 : return the normal CRC (for Hash Table index)*/static unsigned long cal_CRC(unsigned char * Data, unsigned int Len, u8 flag){ u32 crc = ether_crc_le(Len, Data); if (flag) return ~crc; return crc; }/* Read a byte from I/O port*/static u8 ior(board_info_t *db, int reg){ outb(reg, db->io_addr); return inb(db->io_data);}/* Write a byte to I/O port*/static void iow(board_info_t *db, int reg, u8 value){ outb(reg, db->io_addr); outb(value, db->io_data);}/* Read a word from phyxcer*/static u16 phy_read(board_info_t *db, int reg, int port){ reg = (port<<6) | reg; /* Fill the phyxcer register into REG_0C */ iow(db, 0xc, reg); iow(db, 0xb, 0x8); /* Clear phyxcer read command */ iow(db, 0xb, 0xc); /* Issue phyxcer read command */ iow(db, 0xb, 0x8); /* Clear phyxcer read command */ do { if (!(ior(db,0xb) & 0x1)) break; }while(1); /* The read data keeps on REG_0D & REG_0E */ return ( ior(db, DM9KS_EPDRH) << 8 ) | ior(db, DM9KS_EPDRL);}/* Write a word to phyxcer*/static void phy_write(board_info_t *db, int reg, u16 value, int port){ reg = (port<<6) | reg; /* Fill the phyxcer register into REG_0C */ iow(db, 0xc, reg); /* Fill the written data into REG_0D & REG_0E */ iow(db, 0xd, (value & 0xff)); iow(db, 0xe, ( (value >> 8) & 0xff)); iow(db, 0xb, 0x8); /* Clear phyxcer write command */ iow(db, 0xb, 0xa); /* Issue phyxcer write command */ iow(db, 0xb, 0x8); /* Clear phyxcer write command */ do { if (!(ior(db,0xb) & 0x1)) break; }while(1);}/* selec 0:input(RX) 1:output(TX) if selec=0, move data from FIFO to data_ptr if selec=1, move data from data_ptr to FIFO*/static void move8(board_info_t *db,unsigned char *data_ptr, int leng, int selec){ int i; if (selec) for (i=0; i<leng; i++) outb((data_ptr[i] & 0xff), db->io_data); else for (i=0; i<leng; i++) data_ptr[i] = inb(db->io_data);} static void move16(board_info_t *db,unsigned char *data_ptr, int leng, int selec){ int i, tmpleng; tmpleng = (leng + 1) >> 1; if (selec) { for (i=0; i<tmpleng; i++) outw(((u16 *)data_ptr)[i], db->io_data); } else for (i=0; i<tmpleng; i++) ((u16 *)data_ptr)[i] = inw(db->io_data);} static void move32(board_info_t *db,unsigned char *data_ptr, int leng, int selec){ int i, tmpleng; tmpleng = (leng + 3) >> 2; if (selec) for (i=0; i<tmpleng; i++) outl(((u32 *)data_ptr)[i], db->io_data); else for (i=0; i<tmpleng; i++) ((u32 *)data_ptr)[i]=inl(db->io_data);} #ifdef MODULEMODULE_LICENSE("GPL");MODULE_DESCRIPTION("Davicom DM9013 ISA/uP Fast Ethernet Driver");MODULE_PARM(irq, "i");MODULE_PARM(iobase, "i");MODULE_PARM_DESC(irq,"EtherLink IRQ number");MODULE_PARM_DESC(iobase, "EtherLink I/O base address");/* Description: when user used insmod to add module, system invoked init_module() to initilize and register.*/int init_module(void){ media_mode = DM9KS_AUTO; dmfe_dev = dmfe_probe1(); if(IS_ERR(dmfe_dev)) return PTR_ERR(dmfe_dev); return 0;}/* Description: when user used rmmod to delete module, system invoked clean_module() to un-register DEVICE.*/void cleanup_module(void){ struct net_device *dev = dmfe_dev; DMFE_DBUG(0, "clean_module()", 0); unregister_netdev(dmfe_dev); release_region(dev->base_addr, 2);#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) kfree(dev);#else free_netdev(dev);#endif DMFE_DBUG(0, "clean_module() exit", 0);}#endif
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