fet430_ta02.c

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//******************************************************************************
//  MSP-FET430P430 Demo - Timer_A Toggle P5.1, CCR0 upmode ISR, DCO SMCLK 
//
//  Description; toggle P5.1 using using software and TA_0 ISR. Timer_A is 
//  configured in upmode, thus the timer will overflow when TAR counts to CCR0.  
//  In this example, CCR0 is loaded with 20000. 
//  ACLK = n/a, MCLK = SMCLK = TACLK = DCO = 32xACLK = 1.048576Mhz
//
//           MSP430FG439
//         ---------------
//     /|\|            XIN|-  
//      | |               |
//      --|RST        XOUT|-
//        |               |
//        |           P5.1|-->LED
//
//  M. Buccini
//  Texas Instruments, Inc
//  June 2004
//  Built with IAR Embedded Workbench Version: 2.21B
//******************************************************************************

#include <msp430xG43x.h>

void main(void)
{ 

  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  P5DIR |= 0x02;                        // P5.1 output
  CCTL0 = CCIE;                         // CCR0 interrupt enabled
  CCR0 = 20000;
  TACTL = TASSEL_2 + MC_1;              // SMCLK, upmode
  _BIS_SR(LPM0_bits + GIE);             // Enter LPM0 w/ interrupt
}

// Timer A0 interrupt service routine
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
  P5OUT ^= 0x02;                        // Toggle P5.1 using exclusive-OR
}