fet430_tb03.c

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//******************************************************************************
//  MSP-FET430P430 Demo - Timer_B Toggle P5.1, overflow ISR, DCO SMCLK 
//
//  Description; This program will toggle P5.1 using software and the timer_B 
//  overflow ISR. In this example an ISR will trigger when TB overflows.  
//  Inside the ISR P5.1 is toggled.  Toggle rate is 16hz using DCO frequency 
//  of 1048576Hz with default FLL and watch crystal.	 
//  ACLK = LFXT1 = 32768, MCLK = SMCLK = TBCLK = DCO = 32xACLK = 1.048576MHz
//  Proper use of TBIV interrupt vector generator demonstrated.
//  //*An external watch crystal on XIN XOUT is required for ACLK*//	  
//  
//           MSP430FG439
//         ---------------
//     /|\|            XIN|-  
//      | |               | 32kHz
//      --|RST        XOUT|-
//        |               |
//        |           P5.1|-->LED
//
//  M. Buccini
//  Texas Instruments, Inc
//  June 2004
//  Built with IAR Embedded Workbench Version: 2.21B
//******************************************************************************

#include <msp430xG43x.h>

void main(void)
{ 
  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  FLL_CTL0 |= XCAP14PF;                 // Configure load caps
  P5DIR |= 0x02;                        // Set P5.1 to output direction
  TBCTL = TBSSEL1 + TBCLR + TBIE;       // SMCLK, clr. TBR, interrupt
  TBCTL |= MC1;                         // Start Timer_B in continous
  TBCTL = TBSSEL_2 + MC_2 + TBIE;       // SMCLK, contmode, interrupt

  _BIS_SR(LPM0_bits + GIE);             // Enter LPM0 w/ interrupt
}

// Timer_B7 Interrupt Vector (TBIV) handler
#pragma vector=TIMERB1_VECTOR
__interrupt void Timer_B(void)
{
 switch( TBIV )
 {
   case  2: break;                      // CCR1 not used
   case  4: break;                      // CCR2 not used
   case 14: P5OUT ^= 0x02;              // overflow
            break;
 }
}