rr_graph_area.c

用c＋＋写的用于FPGA设计中布图布线的工具源码

          ntrans_no_sharing += unsharable_switch_trans[iswitch] + 
                               sharable_switch_trans[iswitch];
          ntrans_sharing += unsharable_switch_trans[iswitch]; 

          shared_opin_buffer_trans = max (shared_opin_buffer_trans, 
                                         sharable_switch_trans[iswitch]);
       }

       ntrans_sharing += shared_opin_buffer_trans;
       break;
 
    default:
       break;

    }  /* End switch on from_rr_type */
 }  /* End for all nodes */

 free (cblock_counted);
 free (shared_buffer_trans);
 free (unsharable_switch_trans);
 free (sharable_switch_trans);

/* Now add in the input connection block transistors. */

 input_cblock_trans = get_cblock_trans (num_inputs_to_cblock, 
             max_inputs_to_cblock, trans_cblock_to_lblock_buf, trans_sram_bit);

 free (num_inputs_to_cblock);

 ntrans_sharing += input_cblock_trans;
 ntrans_no_sharing += input_cblock_trans;

 printf ("\nRouting area (in minimum width transistor areas):\n");
 printf ("Assuming no buffer sharing (pessimistic). Total: %#g  Per clb: "
         "%#g\n", ntrans_no_sharing, ntrans_no_sharing / (float) (nx * ny));
 printf ("Assuming buffer sharing (slightly optimistic). Total: %#g  Per clb: "
          "%#g\n\n", ntrans_sharing, ntrans_sharing / (float) (nx * ny));
}


static float get_cblock_trans (int *num_inputs_to_cblock, int 
           max_inputs_to_cblock, float trans_cblock_to_lblock_buf, 
           float trans_sram_bit) {

/* Computes the transistors in the input connection block multiplexers and   *
 * the buffers from connection block outputs to the logic block input pins.  *
 * For speed, I precompute the number of transistors in the multiplexers of  *
 * interest.                                                                 */

 float *trans_per_cblock;            /* [0..max_inputs_to_cblock] */
 float trans_count;
 int i, num_inputs;

 trans_per_cblock = (float *) my_malloc ((max_inputs_to_cblock + 1) * 
                         sizeof(float));

 trans_per_cblock[0] = 0.;   /* i.e., not an IPIN or no inputs */

/* With one or more inputs, add the mux and output buffer.  I add the output *
 * buffer even when the number of inputs = 1 (i.e. no mux) because I assume  *
 * I need the drivability just for metal capacitance.                        */

 for (i=1;i<=max_inputs_to_cblock;i++) 
    trans_per_cblock[i] = trans_per_mux (i, trans_sram_bit) + 
                          trans_cblock_to_lblock_buf;

 trans_count = 0.;

 for (i=0;i<num_rr_nodes;i++) {
    num_inputs = num_inputs_to_cblock[i];
    trans_count += trans_per_cblock[num_inputs];
 }

 free (trans_per_cblock);
 return (trans_count);
}


static float *alloc_and_load_unsharable_switch_trans (int num_switch, 
         float trans_sram_bit, float R_minW_nmos) {

/* Loads up an array that says how many transistors are needed to implement  *
 * the unsharable portion of each switch type.  The SRAM bit of a switch and *
 * the pass transistor (forming either the entire switch or the output part  *
 * of a tri-state buffer) are both unsharable.                               */

 float *unsharable_switch_trans, Rpass;
 int i;

 unsharable_switch_trans = (float *) my_malloc (num_switch * sizeof (float));

 for (i=0;i<num_switch;i++) {

    if (switch_inf[i].buffered == FALSE) {
       Rpass = switch_inf[i].R;
    }
    else {   /* Buffer.  Set Rpass = Rbuf = 1/2 Rtotal. */
       Rpass = switch_inf[i].R / 2.;
    }
    
    unsharable_switch_trans[i] = trans_per_R (Rpass, R_minW_nmos) +
                                 trans_sram_bit;
 }

 return (unsharable_switch_trans);
}


static float *alloc_and_load_sharable_switch_trans (int num_switch,
         float trans_sram_bit, float R_minW_nmos, float R_minW_pmos) {

/* Loads up an array that says how many transistor are needed to implement   *
 * the sharable portion of each switch type.  The SRAM bit of a switch and   *
 * the pass transistor (forming either the entire switch or the output part  *
 * of a tri-state buffer) are both unsharable.  Only the buffer part of a    *
 * buffer switch is sharable.                                                */
 
 float *sharable_switch_trans, Rbuf;
 int i;
 
 sharable_switch_trans = (float *) my_malloc (num_switch * sizeof (float));
 
 for (i=0;i<num_switch;i++) {
 
    if (switch_inf[i].buffered == FALSE) {
       sharable_switch_trans[i] = 0.;
    }
    else {   /* Buffer.  Set Rbuf = Rpass = 1/2 Rtotal. */
       Rbuf = switch_inf[i].R / 2.;
       sharable_switch_trans[i] = trans_per_buf (Rbuf, R_minW_nmos, 
                                  R_minW_pmos);
    }
 }
 
 return (sharable_switch_trans);
}
 

static float trans_per_buf (float Rbuf, float R_minW_nmos, float R_minW_pmos) {

/* Returns the number of minimum width transistor area equivalents needed to *
 * implement this buffer.  Assumes a stage ratio of 4, and equal strength    *
 * pull-up and pull-down paths.                                              */

 int num_stage, istage;
 float trans_count, stage_ratio, Rstage;

 if (Rbuf > 0.6 * R_minW_nmos || Rbuf <= 0.) { /* Use a single-stage buffer */
    trans_count = trans_per_R (Rbuf, R_minW_nmos) + trans_per_R (Rbuf, 
                                  R_minW_pmos);
 }
 else {   /* Use a multi-stage buffer */

 /* Target stage ratio = 4.  1 minimum width buffer, then num_stage bigger *
  * ones.                                                                  */

    num_stage = nint (log10 (R_minW_nmos / Rbuf) / log10 (4.));
    num_stage = max (num_stage, 1);
    stage_ratio = pow (R_minW_nmos / Rbuf, 1. / (float) num_stage);

    Rstage = R_minW_nmos;
    trans_count = 0.;

    for (istage=0;istage<=num_stage;istage++) {
       trans_count += trans_per_R (Rstage, R_minW_nmos) + trans_per_R (Rstage,
                         R_minW_pmos);
       Rstage /= stage_ratio;
    }
 }

 return (trans_count);
}


static float trans_per_mux (int num_inputs, float trans_sram_bit) {

/* Returns the number of transistors needed to build a pass transistor mux. *
 * DOES NOT include input buffers or any output buffer.  Assumes the pass   *
 * transistors are minimum-size n transistors.                              */

 int nlevels;
 float ntrans;

/* - 0.00001 is to make sure exact powers of two don't get rounded up *
 * to one extra level.                                                */

 if (num_inputs <= 1) {
    return (0);
 }

 nlevels = ceil (log10(num_inputs) / log10(2.) - 0.00001);
 ntrans = trans_sram_bit * nlevels + 2 * num_inputs - 2;
 return (ntrans);
}


static float trans_per_R (float Rtrans, float R_minW_trans) {

/* Returns the number of minimum width transistor area equivalents needed    *
 * to make a transistor with Rtrans, given that the resistance of a minimum  *
 * width transistor of this type is R_minW_trans.                            */

 float trans_area; 

 if (Rtrans <= 0.)   /* Assume resistances are nonsense -- use min. width */
    return (1.);

 if (Rtrans >= R_minW_trans) 
    return (1.);

/* Area = minimum width area (1) + 0.5 for each additional unit of width.  *
 * The 50% factor takes into account the "overlapping" that occurs in      *
 * horizontally-paralleled transistors, and the need for only one spacing, *
 * not two (i.e. two min W transistors need two spaces; a 2W transistor    *
 * needs only 1).                                                          */

 trans_area = 0.5 * R_minW_trans / Rtrans + 0.5;
 return (trans_area); 
}