varv8da.mdf

Proteus+7.8+元件库

LISA MODEL DESCRIPTION FORMAT 6.0
=================================
Design:   C:\Program Files\Labcenter Electronics\VSM.LIBS\VSM.LIBS SAMPLES\METERS AND GENERATORS\RAMP DIGITAL PSU8.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author:   <NONE>
Created:  31/07/04
Modified: 03/08/04

*PROPERTIES,17   
ALOAD=<ALOAD>
ARESET=<ARESET>
CRESET=<CRESET>
IMAX=<IMAX>
LOAD=<LOAD>
LOWER=<LOWER>
STATE=<STATE>
STEP1V=<STEP1V>
STEP2V=<STEP2V>
STEP3V=<STEP3V>
STEP4V=<STEP4V>
STEP5V=<STEP5V>
STEP6V=<STEP6V>
STEP7V=<STEP7V>
STEP8V=<STEP8V>
UPPER=<UPPER>
USEDIR=<USEDIR>

*MAPPINGS,3,STATE
3 : SCALE=1
4 : SCALE=1000
5 : SCALE=1000000

*MODELDEFS,0    

*PARTLIST,50   
RP1_R1,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R2,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R3,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R4,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R5,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R6,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R7,RESISTOR,10k,PRIMITIVE=ANALOG
RP1_R8,RESISTOR,10k,PRIMITIVE=ANALOG
S1_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
S2_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
S3_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
S4_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
S5_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
S6_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
S7_AVS?,AVS,1.0*(V(A)+V(B)),PRIMITIVE=ANALOGUE
IP1,RTIPROBE,RTIPROBE,ELEMENT=1,MAX=1,MIN=0,PRIMITIVE=ANALOG,SCALE=<SCALE>
R1,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R2,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R3,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R4,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R5,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R6,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R7,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R8,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R9,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R10,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R11,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R12,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R13,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R14,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R15,RES,1T,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
SW1,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW2,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW3,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW4,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW5,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW6,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW7,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
SW8,DSWITCH,DSWITCH,PRIMITIVE=PASSIVE,ROFF=OFF,RON=1m,TSWITCH=1u
U1,COUNTER_8,COUNTER_8,ALOAD=<ALOAD>,ARESET=<ARESET>,LOWER=<LOWER>,PRIMITIVE=DIGITAL,RESET=<CRESET>,TDHZOQ=50n,TDLZOQ=50n,TDZHOQ=50n,TDZLOQ=50n,TGQ=10n,UPPER=<UPPER>,USEDIR=<USEDIR>
U2,INVERTER,INVERTER,PRIMITIVE=DIGITAL
U3,INVERTER,INVERTER,PRIMITIVE=DIGITAL
V1,VSOURCE,<STEP8V>,PRIMITIVE=ANALOG
V2,VSOURCE,<STEP7V>,PRIMITIVE=ANALOG
V3,VSOURCE,<STEP6V>,PRIMITIVE=ANALOG
V4,VSOURCE,<STEP5V>,PRIMITIVE=ANALOG
V5,VSOURCE,<STEP4V>,PRIMITIVE=ANALOG
V6,VSOURCE,<STEP3V>,PRIMITIVE=ANALOG
V7,VSOURCE,<STEP2V>,PRIMITIVE=ANALOG
V8,VSOURCE,<STEP1V>,PRIMITIVE=ANALOG

*NETLIST,53   
#00000,2
SW1,IO,A
V8,PS,+

#00001,2
SW2,IO,A
V6,PS,+

#00002,2
SW3,IO,A
V4,PS,+

#00003,2
SW4,IO,A
V1,PS,+

#00004,2
SW5,IO,A
V3,PS,+

#00005,2
SW6,IO,A
V5,PS,+

#00006,2
SW7,IO,A
V7,PS,+

#00007,2
SW8,IO,A
V2,PS,+

#00008,2
U1,IP,OE
U2,OP,Q

#00009,1
U1,OP,MIN

#00010,1
U1,OP,MAX

#00011,1
U1,OP,RCO

#00012,2
U2,IP,D
U3,OP,Q

VOUT,2
VOUT,GT
IP1,PS,-

D4,2
D4,IT
U1,IP,D4

D3,2
D3,IT
U1,IP,D3

D2,2
D2,IT
U1,IP,D2

D1,2
D1,IT
U1,IP,D1

D0,2
D0,IT
U1,IP,D0

D5,2
D5,IT
U1,IP,D5

D6,2
D6,IT
U1,IP,D6

D7,2
D7,IT
U1,IP,D7

$DIS$,2
$DIS$,IT
U3,IP,D

UCLK,2
UCLK,IT
U1,IP,UCLK

DCLK,2
DCLK,IT
U1,IP,DCLK

CE,2
CE,IT
U1,IP,CE

LOAD,2
LOAD,IT
U1,IP,LOAD

RESET,2
RESET,IT
U1,IP,RESET

CNTUP,2
CNTUP,IT
U1,IP,CNTUP

DQ0,4
DQ0,LBL
RP1_R1,PS,2
U1,OP,Q0
SW1,IP,EN

DQ1,4
DQ1,LBL
RP1_R2,PS,2
U1,OP,Q1
SW7,IP,EN

DQ2,4
DQ2,LBL
RP1_R3,PS,2
U1,OP,Q2
SW2,IP,EN

DQ3,4
DQ3,LBL
RP1_R4,PS,2
U1,OP,Q3
SW6,IP,EN

DQ4,4
DQ4,LBL
RP1_R5,PS,2
U1,OP,Q4
SW3,IP,EN

DQ5,4
DQ5,LBL
RP1_R6,PS,2
U1,OP,Q5
SW5,IP,EN

DQ6,4
DQ6,LBL
RP1_R7,PS,2
U1,OP,Q6
SW8,IP,EN

DQ7,4
DQ7,LBL
RP1_R8,PS,2
U1,OP,Q7
SW4,IP,EN

#00013,3
S3_AVS?,PS,A
S1_AVS?,PS,+
R15,PS,1

#00014,3
S3_AVS?,PS,B
S2_AVS?,PS,+
R14,PS,1

#00015,3
S3_AVS?,PS,+
R1,PS,2
IP1,PS,+

#00016,3
S4_AVS?,PS,A
SW1,IO,B
R9,PS,1

#00017,3
S4_AVS?,PS,B
R8,PS,1
SW7,IO,B

#00018,3
S4_AVS?,PS,+
S1_AVS?,PS,A
R11,PS,1

#00019,3
S5_AVS?,PS,A
SW2,IO,B
R7,PS,1

#00020,3
S5_AVS?,PS,B
SW6,IO,B
R6,PS,1

#00021,3
S5_AVS?,PS,+
S1_AVS?,PS,B
R12,PS,1

#00022,3
S6_AVS?,PS,A
R4,PS,1
SW3,IO,B

#00023,3
S6_AVS?,PS,B
SW5,IO,B
R5,PS,1

#00024,3
S6_AVS?,PS,+
S2_AVS?,PS,A
R10,PS,1

#00025,3
S7_AVS?,PS,A
SW8,IO,B
R2,PS,1

#00026,3
S7_AVS?,PS,B
SW4,IO,B
R3,PS,1

#00027,3
S7_AVS?,PS,+
S2_AVS?,PS,B
R13,PS,1

GND,39
GND,PR
S7_AVS?,PS,-
S6_AVS?,PS,-
S5_AVS?,PS,-
S4_AVS?,PS,-
S3_AVS?,PS,-
S2_AVS?,PS,-
S1_AVS?,PS,-
RP1_R1,PS,1
RP1_R2,PS,1
RP1_R3,PS,1
RP1_R4,PS,1
RP1_R5,PS,1
RP1_R6,PS,1
RP1_R7,PS,1
RP1_R8,PS,1
R8,PS,2
R9,PS,2
R11,PS,2
R15,PS,2
R12,PS,2
R1,PS,1
R10,PS,2
R4,PS,2
R5,PS,2
R7,PS,2
R6,PS,2
R2,PS,2
R3,PS,2
V8,PS,-
V7,PS,-
V6,PS,-
V5,PS,-
V4,PS,-
V3,PS,-
V2,PS,-
V1,PS,-
R13,PS,2
R14,PS,2

*GATES,0