40192.mdf

Proteus+7.8+元件库

LISA MODEL DESCRIPTION FORMAT 6.0
=================================
Design:   C:\Program Files\Labcenter Electronics\3RD PARTY LIBS_MODELS\VSM.LIBS SAMPLES\CMOS SERIES MODEL DESIGNS\cd40192_3_bp\40192.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author:   <NONE>
Created:  28/07/03
Modified: 29/09/03

*PROPERTIES,1    
INIT=?

*MAPPINGS,3,VALUE+VOLTAGE
CD40192+5V : TDLHCQ=250n, TDHLCQ=120n, TDLHLQ=120n, TDHLLQ=230n, TDLHXC=300n, TDHLXC=40n, TDLHXB=16n, TDHLXB=16n, TDLHRQ=22n, TDHLRQ=22n, TDB=0, TDC=0 , TGQ=?       
CD40192+10V : TDLHCQ=100n, TDHLCQ=50n, TDLHLQ=50n, TDHLLQ=90n, TDLHXC=120n, TDHLXC=18n, TDLHXB=13n, TDHLXB=13n, TDLHRQ=30n, TDHLRQ=30n, TDB=17n, TDC=17N  , TGQ=?          
CD40192+15V : TDLHCQ=80n, TDHLCQ=40n,  TDLHLQ=65n, TDHLLQ=55n, TDLHXC=95n, TDHLXC=12n, TDLHXB=16n, TDHLXB=15n, TDLHRQ=23n, TDHLRQ=23n, TDB=0, TDC=0  , TGQ=?

*MODELDEFS,0    

*PARTLIST,6   
U2,COUNTER_4,COUNTER_4,ALOAD=TRUE,ARESET=TRUE,INIT=<INIT>,INVERT="LOAD,MIN,MAX",PRIMITIVE=DIGITAL,TDHLCQ=<TDHLCQ>,TDHLLQ=<TDHLLQ>,TDHLRQ=<TDHLRQ>,TDHLXF=0,TDLHCQ=<TDLHCQ>,TDLHLQ=<TDLHLQ>,TDLHRQ=<TDLHRQ>,TDLHXF=0,TGQ=<TGQ>,UPPER=9,USEDIR=FALSE
U3,OR_2,OR_2,PRIMITIVE=DIGITAL,TDHLDQ=<TDHLXB>,TDLHDQ=<TDLHXB>,TGQ=<TGQ>
U4,OR_2,OR_2,PRIMITIVE=DIGITAL,TDHLDQ=<TDHLXC>,TDLHDQ=<TDLHXC>,TGQ=<TGQ>
U5,DELAY_1,<TDB>,PRIMITIVE=DIGITAL
U6,DELAY_1,<TDC>,PRIMITIVE=DIGITAL
U7,OR_2,OR_2,INVERT=D0,PRIMITIVE=DIGITAL

*NETLIST,20  
#00000,2   
U2,OP,MIN
U3,IP,D0

#00001,2   
U2,OP,MAX
U4,IP,D0

#00002,2   
U3,OP,Q
U5,IP,D0

#00003,2   
U4,OP,Q
U6,IP,D0

#00004,3   
U5,PS,EN
U7,OP,Q
U6,PS,EN

D0,2   
D0,IT
U2,IP,D0

D1,2   
D1,IT
U2,IP,D1

D2,2   
D2,IT
U2,IP,D2

D3,2   
D3,IT
U2,IP,D3

Q0,2   
Q0,OT
U2,OP,Q0

Q1,2   
Q1,OT
U2,OP,Q1

Q2,2   
Q2,OT
U2,OP,Q2

Q3,2   
Q3,OT
U2,OP,Q3

UP,3   
UP,IT
U2,IP,UCLK
U4,IP,D1

DN,3   
DN,IT
U2,IP,DCLK
U3,IP,D1

VCC,4   
VCC,PR
U2,IP,OE
U2,IP,CNTUP
U2,IP,CE

PL,3   
PL,IT
U2,IP,LOAD
U7,IP,D0

MR,3   
MR,IT
U2,IP,RESET
U7,IP,D1

TCD,2   
TCD,OT
U5,OP,Q0

TCU,2   
TCU,OT
U6,OP,Q0