p&e_multilink_cyclonepro.map

J1850源码,该程序给出了美国制定的J1850汽车网络的编程模块,以容错处理.

     RX_BUFF                                    600      10      16       1   .abs_section_600
     BACK_RX_BUFF                               610      10      16       1   .abs_section_610
     BDLCStatusFlags                            518       7       7      13   .common     
     sBDLCErrFlags                              51F       3       3       3   .common     
     RxBuffer                                   522       2       2       1   .common     
     RETRANSMIT_BUFF                            524       2       2      12   .common     
     BackRxBuffer                               526       2       2       8   .common     
     TransmitBuffer                             528       6       6       4   .common     

*********************************************************************************************
MODULE STATISTIC
  Name                                      Data   Code  Const
---------------------------------------------------------------------------------------------
  mc9s12dj64.c.o                             336      0      0
  main.c.o                                     0      8      0
  Start12.c.o                                  0     52      0
  Vectors.c.o                                  0      2    128
  BDLC.c.o                                    79    505      0
  other                                      256     10     18

*********************************************************************************************
SECTION USE IN OBJECT-ALLOCATION SECTION
---------------------------------------------------------------------------------------------
SECTION: ".text"
  main Init vfnBDLC_Driver vfnBDLC_Idle vfnBDLC_ReceiveFrame vfnBDLC_SendFrame 
  vfnBDLC_ErrChecking vfnSwapRxBuffer u8fCheckBufferPriority u8fnBDLCTransmit 
  vfnBDLCErrorHandling vfnErrDo_s 
SECTION: ".data"
  vfnpaBDLC_Driver 
SECTION: ".bss"
  bBDLCDriverStatus FrameStatus u8RxPointer u8Data u8ReceiveCmd SwapBuffer 
  BDLCOutBufferPtr TxFrameLenght TxCount 
SECTION: ".init"
  _Startup 
SECTION: "NON_BANKED"
  Cpu_Interrupt BDLC_Isr 
SECTION: ".abs_section_8"
  _PORTE 
SECTION: ".abs_section_9"
  _DDRE 
SECTION: ".abs_section_a"
  _PEAR 
SECTION: ".abs_section_b"
  _MODE 
SECTION: ".abs_section_c"
  _PUCR 
SECTION: ".abs_section_d"
  _RDRIV 
SECTION: ".abs_section_e"
  _EBICTL 
SECTION: ".abs_section_10"
  _INITRM 
SECTION: ".abs_section_11"
  _INITRG 
SECTION: ".abs_section_12"
  _INITEE 
SECTION: ".abs_section_13"
  _MISC 
SECTION: ".abs_section_15"
  _ITCR 
SECTION: ".abs_section_16"
  _ITEST 
SECTION: ".abs_section_1c"
  _MEMSIZ0 
SECTION: ".abs_section_1d"
  _MEMSIZ1 
SECTION: ".abs_section_1e"
  _INTCR 
SECTION: ".abs_section_1f"
  _HPRIO 
SECTION: ".abs_section_28"
  _BKPCT0 
SECTION: ".abs_section_29"
  _BKPCT1 
SECTION: ".abs_section_2a"
  _BKP0X 
SECTION: ".abs_section_2b"
  _BKP0H 
SECTION: ".abs_section_2c"
  _BKP0L 
SECTION: ".abs_section_2d"
  _BKP1X 
SECTION: ".abs_section_2e"
  _BKP1H 
SECTION: ".abs_section_2f"
  _BKP1L 
SECTION: ".abs_section_30"
  _PPAGE 
SECTION: ".abs_section_32"
  _PORTK 
SECTION: ".abs_section_33"
  _DDRK 
SECTION: ".abs_section_34"
  _SYNR 
SECTION: ".abs_section_35"
  _REFDV 
SECTION: ".abs_section_37"
  _CRGFLG 
SECTION: ".abs_section_38"
  _CRGINT 
SECTION: ".abs_section_39"
  _CLKSEL 
SECTION: ".abs_section_3a"
  _PLLCTL 
SECTION: ".abs_section_3b"
  _RTICTL 
SECTION: ".abs_section_3c"
  _COPCTL 
SECTION: ".abs_section_3f"
  _ARMCOP 
SECTION: ".abs_section_40"
  _TIOS 
SECTION: ".abs_section_41"
  _CFORC 
SECTION: ".abs_section_42"
  _OC7M 
SECTION: ".abs_section_43"
  _OC7D 
SECTION: ".abs_section_46"
  _TSCR1 
SECTION: ".abs_section_47"
  _TTOV 
SECTION: ".abs_section_48"
  _TCTL1 
SECTION: ".abs_section_49"
  _TCTL2 
SECTION: ".abs_section_4a"
  _TCTL3 
SECTION: ".abs_section_4b"
  _TCTL4 
SECTION: ".abs_section_4c"
  _TIE 
SECTION: ".abs_section_4d"
  _TSCR2 
SECTION: ".abs_section_4e"
  _TFLG1 
SECTION: ".abs_section_4f"
  _TFLG2 
SECTION: ".abs_section_60"
  _PACTL 
SECTION: ".abs_section_61"
  _PAFLG 
SECTION: ".abs_section_66"
  _MCCTL 
SECTION: ".abs_section_67"
  _MCFLG 
SECTION: ".abs_section_68"
  _ICPAR 
SECTION: ".abs_section_69"
  _DLYCT 
SECTION: ".abs_section_6a"
  _ICOVW 
SECTION: ".abs_section_6b"
  _ICSYS 
SECTION: ".abs_section_70"
  _PBCTL 
SECTION: ".abs_section_71"
  _PBFLG 
SECTION: ".abs_section_86"
  _ATD0STAT0 
SECTION: ".abs_section_89"
  _ATD0TEST1 
SECTION: ".abs_section_8b"
  _ATD0STAT1 
SECTION: ".abs_section_8d"
  _ATD0DIEN 
SECTION: ".abs_section_8f"
  _PORTAD0 
SECTION: ".abs_section_a0"
  _PWME 
SECTION: ".abs_section_a1"
  _PWMPOL 
SECTION: ".abs_section_a2"
  _PWMCLK 
SECTION: ".abs_section_a3"
  _PWMPRCLK 
SECTION: ".abs_section_a4"
  _PWMCAE 
SECTION: ".abs_section_a5"
  _PWMCTL 
SECTION: ".abs_section_a8"
  _PWMSCLA 
SECTION: ".abs_section_a9"
  _PWMSCLB 
SECTION: ".abs_section_c4"
  _PWMSDN 
SECTION: ".abs_section_ca"
  _SCI0CR1 
SECTION: ".abs_section_cb"
  _SCI0CR2 
SECTION: ".abs_section_cc"
  _SCI0SR1 
SECTION: ".abs_section_cd"
  _SCI0SR2 
SECTION: ".abs_section_ce"
  _SCI0DRH 
SECTION: ".abs_section_cf"
  _SCI0DRL 
SECTION: ".abs_section_d2"
  _SCI1CR1 
SECTION: ".abs_section_d3"
  _SCI1CR2 
SECTION: ".abs_section_d4"
  _SCI1SR1 
SECTION: ".abs_section_d5"
  _SCI1SR2 
SECTION: ".abs_section_d6"
  _SCI1DRH 
SECTION: ".abs_section_d7"
  _SCI1DRL 
SECTION: ".abs_section_d8"
  _SPI0CR1 
SECTION: ".abs_section_d9"
  _SPI0CR2 
SECTION: ".abs_section_da"
  _SPI0BR 
SECTION: ".abs_section_db"
  _SPI0SR 
SECTION: ".abs_section_dd"
  _SPI0DR 
SECTION: ".abs_section_e0"
  _IBAD