swreg.c

vt6528芯片交换机API函数和文档运行程序

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This software is copyrighted by and is the sole property of
 * VIA Networking Technologies, Inc. This software may only be used
 * in accordance with the corresponding license agreement. Any unauthorized
 * use, duplication, transmission, distribution, or disclosure of this
 * software is expressly forbidden.
 *
 * This software is provided by VIA Networking Technologies, Inc. "as is"
 * and any express or implied warranties, including, but not limited to, the
 * implied warranties of merchantability and fitness for a particular purpose
 * are disclaimed. In no event shall VIA Networking Technologies, Inc.
 * be liable for any direct, indirect, incidental, special, exemplary, or
 * consequential damages.
 *
 *
 * File:    swreg.c
 *
 * Purpose: Switch register hardware accessing functions
 *
 * Author:  Tevin Chen
 *
 * Date:    Jan 08, 2002
 *
 * Functions:
 *
 * Revision History:
 *
 */


#if !defined(__PLATFORM_H__)
#include "platform.h"
#endif
#if !defined(__SWITCH_H__)
#include "switch.h"
#endif
#if !defined(__SWREG_H__)
#include "swreg.h"
#endif




/*---------------------  Static Definitions -------------------------*/

/*---------------------  Static Types  ------------------------------*/

/*---------------------  Static Macros  -----------------------------*/

/*---------------------  Static Classes  ----------------------------*/

/*---------------------  Static Variables  --------------------------*/

/*---------------------  Static Functions  --------------------------*/

/*---------------------  Export Variables  --------------------------*/
#if defined(__BIG_ENDIAN)  && !defined(__CPU_S3C2510A)
// only for Samsung4510b big endian mode
volatile UINT16    *sg_pioCpuRegData =      (volatile UINT16 *)(PLAT_ASIC_CPUIF_BASE_ADDR + 2);
volatile UINT16    *sg_pioCpuRegAddrLow =   (volatile UINT16 *)(PLAT_ASIC_CPUIF_BASE_ADDR + 4);
volatile UINT16    *sg_pioCpuRegAddrHi =    (volatile UINT16 *)(PLAT_ASIC_CPUIF_BASE_ADDR + 6);
#else
volatile UINT8     *sg_pioCpuRegData =      (volatile UINT8 *)(PLAT_ASIC_CPUIF_BASE_ADDR + 2);
volatile UINT8     *sg_pioCpuRegAddrLow =   (volatile UINT8 *)(PLAT_ASIC_CPUIF_BASE_ADDR + 4);
volatile UINT8     *sg_pioCpuRegAddrHi =    (volatile UINT8 *)(PLAT_ASIC_CPUIF_BASE_ADDR + 6);
#endif




void SWREG_vReadU8 (UINT16 u16Addr, PUINT8 pu8Data)
{
    // protect addr reg from being ruined before read/write data reg
    PLAT_vCpuCriticalEnter();

#ifdef __SWITCH_CPUIF_PCI
    PCIMEM_Read8((g_u32SwMemBA+u16Addr), pu8Data);
#else
    // select addr low
    *sg_pioCpuRegAddrLow = (UINT8)(u16Addr);
    // select addr high
    *sg_pioCpuRegAddrHi = (UINT8)(u16Addr >> 8);
    // read cmd & data reg
    *pu8Data = *sg_pioCpuRegData;
#endif

    PLAT_vCpuCriticalExit();
}


void SWREG_vWriteU8 (UINT16 u16Addr, UINT8 u8Data)
{
    // protect addr reg from being ruined before read/write data reg
    PLAT_vCpuCriticalEnter();

#ifdef __SWITCH_CPUIF_PCI
    PCIMEM_Write8((g_u32SwMemBA+u16Addr), u8Data);
#else
    // select addr low
    *sg_pioCpuRegAddrLow = (UINT8)(u16Addr);
    // select addr high
    *sg_pioCpuRegAddrHi = (UINT8)(u16Addr >> 8);
    // write cmd & data reg
    *sg_pioCpuRegData = u8Data;
#endif

    PLAT_vCpuCriticalExit();
}


/*
 * Description : In HCI,  u16Addr must be even.
 */
void SWREG_vReadU16 (UINT16 u16Addr, PUINT16 pu16Data)
{
    // protect addr reg from being ruined before read/write data reg
    PLAT_vCpuCriticalEnter();

#ifdef __SWITCH_CPUIF_PCI
    PCIMEM_Read16((g_u32SwMemBA+u16Addr), pu16Data);
#else
    // select addr low
    *sg_pioCpuRegAddrLow = (UINT8)(u16Addr);
    // select addr high
    *sg_pioCpuRegAddrHi = (UINT8)(u16Addr >> 8);

    // addr reg will auto increase
#if defined(__BIG_ENDIAN)
    // read cmd & data reg for 1st byte
    *((PUINT8)pu16Data + 1) = *sg_pioCpuRegData;
    // read cmd & data reg for 2nd byte
    *((PUINT8)pu16Data) = *sg_pioCpuRegData;
#else
    // read cmd & data reg for 1st byte
    *((PUINT8)pu16Data) = *sg_pioCpuRegData;
    // read cmd & data reg for 2nd byte
    *((PUINT8)pu16Data + 1) = *sg_pioCpuRegData;
#endif
#endif

    PLAT_vCpuCriticalExit();
}


/*
 * Description : In HCI,  u16Addr must be even.
 */
void SWREG_vWriteU16 (UINT16 u16Addr, UINT16 u16Data)
{
    // protect addr reg from being ruined before read/write data reg
    PLAT_vCpuCriticalEnter();

#ifdef __SWITCH_CPUIF_PCI
    PCIMEM_Write16((g_u32SwMemBA+u16Addr), u16Data);
#else
    // select addr low
    *sg_pioCpuRegAddrLow = (UINT8)(u16Addr);
    // select addr high
    *sg_pioCpuRegAddrHi = (UINT8)(u16Addr >> 8);

    // addr reg will auto increase
    // write cmd & data reg for 1st byte
    *sg_pioCpuRegData = (UINT8)(u16Data);
    // write cmd & data reg for 2nd byte
    *sg_pioCpuRegData = (UINT8)(u16Data >> 8);
#endif

    PLAT_vCpuCriticalExit();
}


void SWREG_vReadU32 (UINT16 u16Addr, PUINT32 pu32Data)
{
    // protect addr reg from being ruined before read/write data reg
    PLAT_vCpuCriticalEnter();

#ifdef __SWITCH_CPUIF_PCI
    PCIMEM_Read32((g_u32SwMemBA+u16Addr), pu32Data);
#else
    // select addr low
    *sg_pioCpuRegAddrLow = (UINT8)(u16Addr);
    // select addr high
    *sg_pioCpuRegAddrHi = (UINT8)(u16Addr >> 8);

    // addr reg will auto increase
#if defined(__BIG_ENDIAN)
    // read cmd & data reg for 1st byte
    *((PUINT8)pu32Data + 3) = *sg_pioCpuRegData;
    // read cmd & data reg for 2nd byte
    *((PUINT8)pu32Data + 2) = *sg_pioCpuRegData;
    // read cmd & data reg for 3rd byte
    *((PUINT8)pu32Data + 1) = *sg_pioCpuRegData;
    // read cmd & data reg for 4th byte
    *((PUINT8)pu32Data) = *sg_pioCpuRegData;
#else
    // read cmd & data reg for 1st byte
    *((PUINT8)pu32Data) = *sg_pioCpuRegData;
    // read cmd & data reg for 2nd byte
    *((PUINT8)pu32Data + 1) = *sg_pioCpuRegData;
    // read cmd & data reg for 3rd byte
    *((PUINT8)pu32Data + 2) = *sg_pioCpuRegData;
    // read cmd & data reg for 4th byte
    *((PUINT8)pu32Data + 3) = *sg_pioCpuRegData;
#endif
#endif

    PLAT_vCpuCriticalExit();
}


void SWREG_vWriteU32 (UINT16 u16Addr, UINT32 u32Data)
{
    // protect addr reg from being ruined before read/write data reg
    PLAT_vCpuCriticalEnter();

#ifdef __SWITCH_CPUIF_PCI
    PCIMEM_Write32((g_u32SwMemBA+u16Addr), u32Data);
#else
    // select addr low
    *sg_pioCpuRegAddrLow = (UINT8)(u16Addr);
    // select addr high
    *sg_pioCpuRegAddrHi = (UINT8)(u16Addr >> 8);

    // addr reg will auto increase
    // write cmd & data reg for 1st byte
    *sg_pioCpuRegData = (UINT8)(u32Data);
    // write cmd & data reg for 2nd byte
    *sg_pioCpuRegData = (UINT8)(u32Data >> 8);
    // write cmd & data reg for 3rd byte
    *sg_pioCpuRegData = (UINT8)(u32Data >> 16);
    // write cmd & data reg for 4th byte
    *sg_pioCpuRegData = (UINT8)(u32Data >> 24);
#endif

    PLAT_vCpuCriticalExit();
}


void SWREG_vBitsOnU8 (UINT16 u16Addr, UINT8 u8BitPtn)
{
    UINT8   u8Data;

    SWREG_vReadU8(u16Addr, &u8Data);
    SWREG_vWriteU8(u16Addr, (UINT8)(u8Data | u8BitPtn));
}


void SWREG_vBitsOffU8 (UINT16 u16Addr, UINT8 u8BitPtn)
{
    UINT8   u8Data;

    SWREG_vReadU8(u16Addr, &u8Data);
    SWREG_vWriteU8(u16Addr, (UINT8)(u8Data & ~u8BitPtn));
}


BOOL SWREG_bIsBitsOnU8 (UINT16 u16Addr, UINT8 u8BitPtn)
{
    UINT8   u8OrgData;

    SWREG_vReadU8(u16Addr, &u8OrgData);
    return ((u8OrgData & u8BitPtn) == u8BitPtn);
}


BOOL SWREG_bIsBitsOffU8 (UINT16 u16Addr, UINT8 u8BitPtn)
{
    UINT8   u8OrgData;

    SWREG_vReadU8(u16Addr, &u8OrgData);
    return ((u8OrgData & u8BitPtn) == 0);
}


//
// if bWaitCond == TRUE, will wait the u8StsBitPtn be set,
// if bWaitCond == FALSE, will wait the u8StsBitPtn be cleared.
//
BOOL SWREG_bWaitStatus (UINT16 u16Addr, UINT8 u8StsBitPtn, BOOL bWaitCond)
{
    UINT8   u8Status;
    UINT    ui;



    // Loop to wait for specified register bit pattern
    for (ui = 0; ui < MAX_LOOP_TIMEOUT; ui++) {
        SWREG_vReadU8(u16Addr, &u8Status);    // read register status
        // Check if wait condition matched
        if ((bWaitCond == TRUE) && ((u8Status & u8StsBitPtn) == u8StsBitPtn))
            return TRUE;
        else if ((bWaitCond == FALSE) && ((u8Status & u8StsBitPtn) == 0))
            return TRUE;
    }

    // timeout
    return FALSE;
}


void SWREG_vReadU64 (UINT16 u16Addr, PUINT8 pu8Data)
{
    UINT    uu;

    for (uu = 0; uu < 2; uu++)
        SWREG_vReadU32(u16Addr + (uu * 4), (PUINT32)(pu8Data + (uu * 4)));
}


void SWREG_vWriteU64 (UINT16 u16Addr, PUINT8 pu8Data)
{
    UINT    uu;

    for (uu = 0; uu < 2; uu++)
        SWREG_vWriteU32(u16Addr + (uu * 4), *((PUINT32)(pu8Data + (uu * 4))));
}


void SWREG_vReadU128 (UINT16 u16Addr, PUINT8 pu8Data)
{
    UINT    uu;

    for (uu = 0; uu < 4; uu++)
        SWREG_vReadU32(u16Addr + (uu * 4), (PUINT32)(pu8Data + (uu * 4)));
}


void SWREG_vWriteU128 (UINT16 u16Addr, PUINT8 pu8Data)
{
    UINT    uu;

    for (uu = 0; uu < 4; uu++)
        SWREG_vWriteU32(u16Addr + (uu * 4), *((PUINT32)(pu8Data + (uu * 4))));
}