swl2ptb.c

vt6528芯片交换机API函数和文档运行程序

/*
 * Description : Delete T-CAM entry.
 * Input : u8EntryIdx: vaule between 0 and 255.
 */
BOOL SWTCAM_bDelEntry (UINT8 u8EntryIdx)
{
    UINT8    abyEntryBuf[TCAM_ENTRY_SIZE];
    UINT32  u32EntryAddr = SRAM_TCAM_VLD_BASE_ADDR + (u8EntryIdx * TCAM_ENTRY_SIZE);
    
    
    // Write sram data, we want to set bit[0][64]
    abyEntryBuf[0] = 0;
    abyEntryBuf[8] = 0;

    SWSRAM_bWriteEntry(u32EntryAddr, abyEntryBuf);
        
    return TRUE;
}


/*
 * Description : Mask field(s) of TCAM mask entry
 * 
 * Input : bIsIpv4 : TRUE, if IPv4 packet format. FLASE, if not IPv4
 *         u16Type: Type of TCAM mask, ex:MSK_DMAC_TYPE, MSK_TCP_SYN, ...
 *         u16ByteMsk: ignore, if bIsIpv4==TRUE
 *                     be masked byte(s) mask , if bIsIpv4==FALSE; ex: the value 0x000F means mask byte0~3
 */
void SWTCAM_vMskEntry(STcamEntry* pSEntry, BOOL bIsIpv4, UINT16 u16Type, UINT16 u16ByteMsk)
{
    UINT8   u8Msk = 0;
    UINT16  u16Msk = 0x0001, u16ByteNum;
    

    if (u16Type & MSK_DMAC_TYPE)
        pSEntry->u8DmacType = u8Msk;
    if (u16Type & MSK_TCP_SYN)
        pSEntry->bTcpSynBit = u8Msk;
    if (u16Type & MSK_VLAN_TYPE)
        pSEntry->bVlanTag = u8Msk;
    if (u16Type & MSK_VID)
        pSEntry->u16Vid = u8Msk;
    if (u16Type & MSK_IPV4)
        pSEntry->bIpv4 = u8Msk;
    if (u16Type & MSK_IPV4_LEN)
        pSEntry->bIpHd20Oct = u8Msk;
    if (u16Type & MSK_IP_FRG)
        pSEntry->bIpFrag = u8Msk;
    if (u16Type & MSK_PORT_ID)
        pSEntry->u8PortId = u8Msk;

    if (bIsIpv4){
        if (u16Type & MSK_IP_PROTO)
            pSEntry->UCfg13B.SIpv4Fld.u8IpProto = u8Msk;
        if (u16Type & MSK_SRC_IP)
            pSEntry->UCfg13B.SIpv4Fld.u32SrcIp = u8Msk;
        if (u16Type & MSK_DST_IP)
            pSEntry->UCfg13B.SIpv4Fld.u32DstIp = u8Msk;
        if (u16Type & MSK_L4)
            pSEntry->UCfg13B.SIpv4Fld.u32IpOption = u8Msk;
    }
    else{
        for (u16ByteNum = 0 ; u16ByteNum < AFT_SV_BYTE_NUM ; u16ByteNum++)
        {
            if (u16Msk & u16ByteMsk)
                pSEntry->UCfg13B.au8AftSV[u16ByteNum] = u8Msk;
            u16Msk = (u16Msk << 1);
        }
    }
}


/*
 * Description : UnMasked field(s) of TCAM mask entry
 * 
 * Input : bIsIpv4 : TRUE, if IPv4 packet format. FLASE, if not IPv4
 *         u16Type: Type of TCAM mask, ex:MSK_DMAC_TYPE, MSK_TCP_SYN, ...
 *         u16ByteMsk: ignore, if bIsIpv4==TRUE
 *                     be unmasked byte(s) mask , if bIsIpv4==FALSE; ex: the value 0x000F means unmask byte0~3
 */
void SWTCAM_vUnMskEntry(STcamEntry* pSEntry, BOOL bIsIpv4, UINT16 u16Type, UINT16 u16ByteMsk)
{
    UINT16  u16Msk = 0x0001, u16ByteNum;


    if (u16Type & MSK_DMAC_TYPE)
        pSEntry->u8DmacType = 0x3;
    if (u16Type & MSK_TCP_SYN)
        pSEntry->bTcpSynBit = 0x1;
    if (u16Type & MSK_VLAN_TYPE)
        pSEntry->bVlanTag = 0x1;
    if (u16Type & MSK_VID)
        pSEntry->u16Vid = 0xFFF;
    if (u16Type & MSK_IPV4)
        pSEntry->bIpv4 = 0x1;
    if (u16Type & MSK_IPV4_LEN)
        pSEntry->bIpHd20Oct = 0x1;
    if (u16Type & MSK_IP_FRG)
        pSEntry->bIpFrag = 0x1;
    if (u16Type & MSK_PORT_ID)
        pSEntry->u8PortId = 0x1F;

    if (bIsIpv4){
        if (u16Type & MSK_IP_PROTO)
            pSEntry->UCfg13B.SIpv4Fld.u8IpProto = 0xFF;
        if (u16Type & MSK_SRC_IP)
            pSEntry->UCfg13B.SIpv4Fld.u32SrcIp = 0xFFFFFFFF;
        if (u16Type & MSK_DST_IP)
            pSEntry->UCfg13B.SIpv4Fld.u32DstIp = 0xFFFFFFFF;
        if (u16Type & MSK_L4)
            pSEntry->UCfg13B.SIpv4Fld.u32IpOption = 0xFFFFFFFF;
    }
    else{
        for (u16ByteNum = 0 ; u16ByteNum < AFT_SV_BYTE_NUM ; u16ByteNum++)
        {
            if (u16Msk & u16ByteMsk)
                pSEntry->UCfg13B.au8AftSV[u16ByteNum] = 0xFF;
            u16Msk = u16Msk << 1;
        }
    }
}


// Entry is L2+ action code format
BOOL SWL2PAC_bGetEntry (UINT8 u8EntryIdx, SL2pACEntry* pSEntry)
{
    UINT8    abyEntryBuf[SRAM_ENTRY_SIZE_8Byte];
    UINT32  u32EntryAddr = SRAM_RULE_ACT_CODE_BASE_ADDR + (u8EntryIdx * SRAM_ENTRY_SIZE_8Byte);


    if (FALSE == s_bIsTcamValid(u8EntryIdx)) {
        // entry is invalid
        return FALSE;
    }

    SWSRAM_bReadEntry(u32EntryAddr, abyEntryBuf);
    // get fields
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_L2PVID_VALID_S, L2PAC_BIT_L2PVID_VALID_E, &(pSEntry->bL2pVidValid));
    SWSRAM_vExtractBitsByByte(abyEntryBuf, L2PAC_BIT_OVERR_TAG_S, L2PAC_BIT_OVERR_TAG_E, &(pSEntry->u8OverTag));
    SWSRAM_vExtractBitsByByte(abyEntryBuf, L2PAC_BIT_BINDING_ID_S, L2PAC_BIT_BINDING_ID_E, &(pSEntry->u8BindId));
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_SECU_DROP_S, L2PAC_BIT_SECU_DROP_E, &(pSEntry->bSecDrop));
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_FILT_EN_S, L2PAC_BIT_FILT_EN_E, &(pSEntry->bFilter));
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_MIRR_EN_S, L2PAC_BIT_MIRR_EN_E, &(pSEntry->bMirror));
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_PRI_VALID_S, L2PAC_BIT_PRI_VALID_E, &(pSEntry->bPriValid));
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_REDIR_EN_S, L2PAC_BIT_REDIR_EN_E, &(pSEntry->bRedirEn));
    SWSRAM_vExtractBitsByBool(abyEntryBuf, L2PAC_BIT_REDIR_TYPE_S, L2PAC_BIT_REDIR_TYPE_E, &(pSEntry->bRedirType));
    SWSRAM_vExtractBits(abyEntryBuf, L2PAC_BIT_REDIR_PORT_IDX_S, L2PAC_BIT_REDIR_PORT_IDX_E, (PUINT8)&(pSEntry->u16RedirPortIndx));
    SWSRAM_vExtractBitsByByte(abyEntryBuf, L2PAC_BIT_PRI_CFG_S, L2PAC_BIT_PRI_CFG_E, &(pSEntry->u8Pri));
    SWSRAM_vExtractBits(abyEntryBuf, L2PAC_BIT_L2PAC_VID_S, L2PAC_BIT_L2PAC_VID_E, (PUINT8)&(pSEntry->u16L2pVid));

    return TRUE;
}


// Entry is L2+ action code format
BOOL SWL2PAC_bInsEntry (UINT8 u8EntryIdx, SL2pACEntry* pSEntry)
{
    UINT8    abyEntryBuf[SRAM_ENTRY_SIZE_8Byte];
    UINT32  u32EntryAddr = SRAM_RULE_ACT_CODE_BASE_ADDR + (u8EntryIdx * SRAM_ENTRY_SIZE_8Byte);



    STR_pvMemset(abyEntryBuf, 0, SRAM_ENTRY_SIZE_8Byte);
    // set fields
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_L2PVID_VALID_S, L2PAC_BIT_L2PVID_VALID_E, &(pSEntry->bL2pVidValid));
    SWSRAM_vModifyBitsByByte(abyEntryBuf, L2PAC_BIT_OVERR_TAG_S, L2PAC_BIT_OVERR_TAG_E, &(pSEntry->u8OverTag));
    SWSRAM_vModifyBitsByByte(abyEntryBuf, L2PAC_BIT_BINDING_ID_S, L2PAC_BIT_BINDING_ID_E, &(pSEntry->u8BindId));
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_SECU_DROP_S, L2PAC_BIT_SECU_DROP_E, &(pSEntry->bSecDrop));
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_FILT_EN_S, L2PAC_BIT_FILT_EN_E, &(pSEntry->bFilter));
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_MIRR_EN_S, L2PAC_BIT_MIRR_EN_E, &(pSEntry->bMirror));
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_PRI_VALID_S, L2PAC_BIT_PRI_VALID_E, &(pSEntry->bPriValid));
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_REDIR_EN_S, L2PAC_BIT_REDIR_EN_E, &(pSEntry->bRedirEn));
    SWSRAM_vModifyBitsByBool(abyEntryBuf, L2PAC_BIT_REDIR_TYPE_S, L2PAC_BIT_REDIR_TYPE_E, &(pSEntry->bRedirType));
    SWSRAM_vModifyBits(abyEntryBuf, L2PAC_BIT_REDIR_PORT_IDX_S, L2PAC_BIT_REDIR_PORT_IDX_E, (PUINT8)&(pSEntry->u16RedirPortIndx));
    SWSRAM_vModifyBitsByByte(abyEntryBuf, L2PAC_BIT_PRI_CFG_S, L2PAC_BIT_PRI_CFG_E, &(pSEntry->u8Pri));
    SWSRAM_vModifyBits(abyEntryBuf, L2PAC_BIT_L2PAC_VID_S, L2PAC_BIT_L2PAC_VID_E, (PUINT8)&(pSEntry->u16L2pVid));

    SWSRAM_bWriteEntry(u32EntryAddr, abyEntryBuf);

    return TRUE;
}


BOOL SWL2PCNT_bGetCnt (UINT8 u8EntryIdx, SL2pHitCnt* pSEntry)
{
    UINT8    abyEntryBuf[TCAM_ENTRY_SIZE];
    UINT32  u32EntryAddr = SRAM_RULE_CNTR_TBL_BASE_ADDR + (u8EntryIdx * TCAM_ENTRY_SIZE);

    
    SWSRAM_bReadEntry(u32EntryAddr, abyEntryBuf);
    SWSRAM_vExtractBits(abyEntryBuf, L2PCNTER_BIT_PKTCNT_S, L2PCNTER_BIT_PKTCNT_E, (PUINT8)&(pSEntry->u32HitPktCnt));
    SWSRAM_vExtractBits(abyEntryBuf, L2PCNTER_BIT_OCTCNT_S, L2PCNTER_BIT_OCTCNT_E, pSEntry->au8HitOctCnt);
                    
    return TRUE;
}


BOOL SWL2PCNT_bClrCnt (UINT8 u8EntryIdx)
{
    UINT8    abyEntryBuf[TCAM_ENTRY_SIZE];
    UINT32  u32EntryAddr = SRAM_RULE_CNTR_TBL_BASE_ADDR + (u8EntryIdx * TCAM_ENTRY_SIZE);    


    STR_pvMemset(abyEntryBuf, 0, TCAM_ENTRY_SIZE);
    SWSRAM_bWriteEntry(u32EntryAddr, abyEntryBuf);
    
    return TRUE;
}


BOOL SWL2PCNT_bClrCntByAddr(UINT32 u32Addr)
{
    UINT8   au8EntryBuf[TCAM_ENTRY_SIZE];


    STR_pvMemset(au8EntryBuf, 0, TCAM_ENTRY_SIZE);

    // write entry
    if (!SWSRAM_bWriteEntry(u32Addr, au8EntryBuf))
        return FALSE;
    return TRUE;
}

//
// Input:  SRAM Addr for T-CAM or L2+ action code
// Output: SRAM Addr for T-CAM valid array
//
static UINT32  s_dwMapAddr (UINT32 u32TcamActAddr)
{
    UINT32 u32ValidAddr;
    UINT16 wOffs;


    //Map to Valid array
    if (u32TcamActAddr >= SRAM_TCAM_VALUE_BASE_ADDR && u32TcamActAddr < SRAM_TCAM_MASK_BASE_ADDR)
    {
        //Value address
        wOffs = u32TcamActAddr - SRAM_TCAM_VALUE_BASE_ADDR;
    }
    else if (u32TcamActAddr >= SRAM_TCAM_MASK_BASE_ADDR && u32TcamActAddr < SRAM_TCAM_VLD_BASE_ADDR)
    {
        //Mask address
        wOffs = u32TcamActAddr - SRAM_TCAM_MASK_BASE_ADDR;
    }
    else if (u32TcamActAddr >= SRAM_RULE_ACT_CODE_BASE_ADDR && u32TcamActAddr < SRAM_SECOND_MAC_TBL_BASE_ADDR)
    {
        //Action code address
        wOffs = (u32TcamActAddr - SRAM_RULE_ACT_CODE_BASE_ADDR) * 2;   //action code entry size is 8 bytes
    }
    else if (u32TcamActAddr >= SRAM_RULE_CNTR_TBL_BASE_ADDR && u32TcamActAddr < SRAM_RULE_CNTR_TBL_BASE_ADDR + SRAM_RULE_CNTR_TBL_SIZE)
    {
        //L2+ rule hit counter address
        wOffs = u32TcamActAddr - SRAM_RULE_CNTR_TBL_BASE_ADDR;
    }
    else //Valid address
        return u32TcamActAddr;

    u32ValidAddr = wOffs + SRAM_TCAM_VLD_BASE_ADDR;

    return u32ValidAddr;
}


void SWL2P_vGetMirPort(PUINT8 pbyPortId, PBOOL pbEnable)
{
    UINT8 u8Data;
    
    
    SWREG_vReadU8(FWDCTL_MIRROR_PORT_CFG, &u8Data);
    *pbyPortId = (u8Data & L2P_MIRROR_PORT_MSK);
    *pbEnable  = (u8Data & L2P_MIRROR_EN);
}


void SWL2P_vSetMirPort(UINT8 byPortId, BOOL bEnable)
{
    
    if (bEnable)
        SWREG_vWriteU8(FWDCTL_MIRROR_PORT_CFG, L2P_MIRROR_EN|byPortId);
    else
        SWREG_vWriteU8(FWDCTL_MIRROR_PORT_CFG, (~L2P_MIRROR_EN)&byPortId);
}