soc.c

vt6528芯片交换机API函数和文档运行程序

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This software is copyrighted by and is the sole property of
 * VIA Networking Technologies, Inc. This software may only be used
 * in accordance with the corresponding license agreement. Any unauthorized
 * use, duplication, transmission, distribution, or disclosure of this
 * software is expressly forbidden.
 *
 * This software is provided by VIA Networking Technologies, Inc. "as is"
 * and any express or implied warranties, including, but not limited to, the
 * implied warranties of merchantability and fitness for a particular purpose
 * are disclaimed. In no event shall VIA Networking Technologies, Inc.
 * be liable for any direct, indirect, incidental, special, exemplary, or
 * consequential damages.
 *
 *
 * File:    soc.c
 *
 * Purpose:
 *
 * Author:  Tevin Chen
 *
 * Date:    Jan 08, 2002
 *
 * Functions:
 *
 * Revision History:
 *
 */


#if !defined(__MACRO_H__)
#include "macro.h"
#endif
#if !defined(__DEVICE_H__)
#include "device.h"
#endif
#if !defined(__TIMER_H__)
#include "timer.h"
#endif
#if !defined(__SOC_H__)
#include "soc.h"
#endif




/*---------------------  Static Definitions  ------------------------*/
// External I/O Bank 0 Control Bit
#define tCOS1                   (0x1 << 16)
#define tACS1                   (0x3 << 19)
#define tCOH1                   (0x2 << 22)
#define tACC1                   (0x3 << 25)
#define tCOS2                   (0x7 << 0)
#define tACS2                   (0x7 << 3)
#define tCOH2                   (0x7 << 6)
#define tACC2                   (0x7 << 9)

/*---------------------  Static Types  ------------------------------*/

/*---------------------  Static Macros  -----------------------------*/

/*---------------------  Static Classes  ----------------------------*/

/*---------------------  Static Variables  --------------------------*/

/*---------------------  Static Functions  --------------------------*/
static void s_vCacheFlush(void);

/*---------------------  Export Variables  --------------------------*/




void SOC_vInit (void)
{
    // Initialize EXTERNAL I/O timing
    ASIC_SYS_EXTACON0 |= (tCOS1 | tACS1 | tCOH1 | tACC1);
    ASIC_SYS_EXTACON1 |= (tCOS2 | tACS2 | tCOH2 | tACC2);

    // Ext IRQ enable
    ASIC_IOP_CON |= IOPCON_IRQ0_ENABLE;

    // LED-3 turn on
    ASIC_IOP_MOD = IOP_DATA_P0;              // set P0 output
    ASIC_IOP_DATA = 0;
}


void SOC_vSetMacResetPin (UINT8 u8PinLevel)
{
    ASIC_IOP_MOD |= 0x02;
    if (u8PinLevel == 0)
        ASIC_IOP_DATA &= 0xFD;
    else
        ASIC_IOP_DATA |= 0x02;
}


void SOC_vSetPhyResetPin (UINT8 u8PinLevel)
{
    ASIC_IOP_MOD |= 0x08;
    if (u8PinLevel == 0)
        ASIC_IOP_DATA &= 0xF7;
    else
        ASIC_IOP_DATA |= 0x08;
}


void SOC_vBoardReboot (void)
{
    // jump to ROM program entry point
    ( (void (*)())ASIC_ROM_BASE_ADDR )();
}


//
// unit of u16Delay is 1 ms
//
void SOC_vDelayPoll (UINT16 u16Delay)
{
    UINT32  u32Delay = u16Delay;
    volatile UINT32  u32Tmp;


    // DON'T change this formula
    u32Delay = u32Delay * 4000;
    while (u32Delay != 0) {
        // assert an IO read cycle for delay
        u32Tmp = ASIC_IOP_DATA;
        u32Delay--;
    }
}


//
// unit of u32Delay is 10 ms
//
// NOTE: DON'T call this function if interrupt is disabled
//       (e.g. in critical sections, in timer callback functions,
//        in other ISRs...), otherwise the program will be blocked
//
void SOC_vDelay (UINT32 u32Delay)
{
    UINT32  u32StampTick = TMR_u32GetSysTick();

    while (1) {
        if (TMR_u32Diff(TMR_u32GetSysTick(), u32StampTick) >= u32Delay)
            break;
    }
}


void SOC_vCacheEnable (void)
{
    ASIC_SYS_SYSCFG |= SYSCFG_CE;
}


void SOC_vCacheDisable (void)
{
    ASIC_SYS_SYSCFG &= ~(SYSCFG_CE);
    s_vCacheFlush();
}


static void s_vCacheFlush (void)
{
    PUINT32 pu32TagRAM;
    UINT    uu;


    pu32TagRAM = (PUINT32)ASIC_CACHE_TAGRAM_BASE_ADDR;
    // Flush Tag Ram
    for (uu = 0; uu < ASIC_CACHE_TAGRAM_SIZE; uu++)
        pu32TagRAM[uu] = 0;
}


void SOC_vDma0Enable (void)
{
    // DRQ0, DAK0 enable
    ASIC_IOP_CON |= (IOPCON_DRQ0_ENABLE | IOPCON_DAK0_ENABLE);
}


void SOC_vDma1Enable (void)
{
    // DRQ1, DAK1 enable
    ASIC_IOP_CON |= (IOPCON_DRQ1_ENABLE | IOPCON_DAK1_ENABLE);
}


void SOC_vDma0GenIntr (BOOL bIntrEn)
{
    if (bIntrEn)
        ASIC_GDMA_CON0 = GDMACON0_DMA_INT_EN;
    else
        ASIC_GDMA_CON0 = 0;
}


void SOC_vDma1GenIntr (BOOL bIntrEn)
{
    if (bIntrEn)
        ASIC_GDMA_CON1 = GDMACON1_DMA_INT_EN;
    else
        ASIC_GDMA_CON1 = 0;
}


void SOC_vDma0TrigRx (PUINT8 pu8Buf, UINT16 u16BufLen, UINT32 u32IoPortAddr)
{
    ASIC_GDMA_CON0 |= (GDMACON0_EXTDREQ | GDMACON0_DEMAND | GDMACON0_TX_HALFWORD | GDMACON0_SRC_FIX);
    ASIC_GDMA_CON0 &= ~GDMACON0_DST_DEC;
    ASIC_GDMA_SRC0 = u32IoPortAddr;                     // Set DMA source pointer
    ASIC_GDMA_DST0 = (UINT32)pu8Buf;                    // Set DMA destination pointer
    // Set transfer counter
    ASIC_GDMA_CNT0 = u16BufLen;
    // let CPU start DMA
    ASIC_GDMA_CON0 |= GDMACON0_RUN;
}


void SOC_vDma0TrigTx (PUINT8 pu8Buf, UINT16 u16BufLen, UINT32 u32IoPortAddr)
{
    ASIC_GDMA_CON0 |= (GDMACON0_EXTDREQ | GDMACON0_DEMAND | GDMACON0_TX_HALFWORD | GDMACON0_DST_FIX);
    ASIC_GDMA_CON0 &= ~GDMACON0_SRC_DEC;
    ASIC_GDMA_SRC0 = (UINT32)pu8Buf;                    // Set DMA source pointer
    ASIC_GDMA_DST0 = u32IoPortAddr;                     // Set DMA destination pointer
    // Set transfer counter
    ASIC_GDMA_CNT0 = u16BufLen;
    // let CPU start DMA
    ASIC_GDMA_CON0 |= GDMACON0_RUN;
}


void SOC_vDma1TrigTx (PUINT8 pu8Buf, UINT16 u16BufLen, UINT32 u32IoPortAddr)
{
    ASIC_GDMA_CON1 |= (GDMACON1_EXTDREQ | GDMACON1_DEMAND | GDMACON1_TX_HALFWORD | GDMACON1_DST_FIX);
    ASIC_GDMA_CON1 &= ~GDMACON1_SRC_DEC;
    ASIC_GDMA_SRC1 = (UINT32)pu8Buf;                    // Set DMA source pointer
    ASIC_GDMA_DST1 = u32IoPortAddr;                     // Set DMA destination pointer
    // Set transfer counter
    ASIC_GDMA_CNT1 = u16BufLen;
    // let CPU start DMA
    ASIC_GDMA_CON1 |= GDMACON1_RUN;
}