piportmp.c

vt6528芯片交换机API函数和文档运行程序

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This software is copyrighted by and is the sole property of
 * VIA Networking Technologies, Inc. This software may only be used
 * in accordance with the corresponding license agreement. Any unauthorized
 * use, duplication, transmission, distribution, or disclosure of this
 * software is expressly forbidden.
 *
 * This software is provided by VIA Networking Technologies, Inc. "as is"
 * and any express or implied warranties, including, but not limited to, the
 * implied warranties of merchantability and fitness for a particular purpose
 * are disclaimed. In no event shall VIA Networking Technologies, Inc.
 * be liable for any direct, indirect, incidental, special, exemplary, or
 * consequential damages.
 *
 *
 * File:    piportmp.c
 *
 * Purpose: Logical and physical port mapping functions
 *
 * Author:  Tevin Chen
 *
 * Date:    Jan 08, 2002
 *
 * Functions:
 *
 * Revision History:
 *
 */


#include "swreg.h"
#include "swtrk.h"
#include "piportmp.h"
#include "pidef.h"
#include "pimod.h"




/*---------------------  Static Definitions  ------------------------*/
// Desired Port Panel
//  01 03 05 07 09 11 13 15 17 19 21 23
//  00 02 04 06 08 10 12 14 16 18 20 22

// Physical Port Panel
//  01 03 05 07 09 11 13 15 17 19 21 23
//  00 02 04 06 08 10 12 14 16 18 20 22

static UINT8 sg_abyPanelToPhyPortMap[SWITCH_PORT_NUM] =
{
    0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11,
   12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
   24, 25
};
static UINT8 sg_abyPhyToPanelPortMap[SWITCH_PORT_NUM] =
{
    0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11,
   12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
   24, 25
};

/*---------------------  Static Classes  ----------------------------*/

/*---------------------  Static Variables  --------------------------*/

/*---------------------  Static Macros  -----------------------------*/

/*---------------------  Static Functions  --------------------------*/
// Definition to make statements more readable
#define pSPortTrkCfg(u16Cfg)     ((SPortTrkCfg*)&u16Cfg)

/*---------------------  Export Variables  --------------------------*/
//
// Definition used for UI
//
// Definition of port names
PSTR g_aszPortNameTable[SWITCH_PORT_NUM+SWITCH_TRUNK_GRP_NUM] =
{
    "PORT1 ", "PORT2 ", "PORT3 ", "PORT4 ", "PORT5 ", "PORT6 ", "PORT7 ", "PORT8 ",
    "PORT9 ", "PORT10", "PORT11", "PORT12", "PORT13", "PORT14", "PORT15", "PORT16",
    "PORT17", "PORT18", "PORT19", "PORT20", "PORT21", "PORT22", "PORT23", "PORT24",
    "MOD1  ", "MOD2  ",
    "TRUNK1", "TRUNK2", "TRUNK3",  "TRUNK4",  "TRUNK5",  "TRUNK6",  "TRUNK7",
    "TRUNK8", "TRUNK9", "TRUNK10", "TRUNK11", "TRUNK12", "TRUNK13"
};

// Define port id to name mapping
UINT8 g_abyPanelIdToNameMap[SWITCH_PORT_NUM+SWITCH_TRUNK_GRP_NUM] =
{
    0,  1,  2,  3,  4,  5,  6,  7,
    8,  9, 10, 11, 12, 13, 14, 15,
   16, 17, 18, 19, 20, 21, 22, 23,
   24, 25, 
   26, 27, 28, 29, 30, 31, 32, 33,
   34, 35, 36, 37, 38 
};

// Logical id list
UINT8 g_byLogIdNum;
UINT8 g_bySingleMegaLogIdNum;   // for sniff config
UINT8 g_byMegaLogIdNum;         // for rate ctrl config
UINT8 g_byModTrkMegaLogIdNum;         // for rate ctrl config
UINT8 g_abyLogIdList[SWITCH_PORT_NUM];          // If module1 and module2 trunk to GroupN, 
                                                // then this array will store GroupN no module1/module2.

BOOL g_bIsModuleTrk;
UINT8 g_byModTrkLogIdNum;
UINT8 g_abyModTrkLogIdList[SWITCH_PORT_NUM];    // If module1 and module2 trunk to GroupN,
                                                // then this array will store module1/module2 no GroupN.



//
// Transfer between logical id/ptr and physical id
//
UINT8 PIPORTMP_byLogIdToPhyId (UINT8 byLogId)
{
    // If logical id out of single port range, return ENTRY_END_FLAG
    if (byLogId >= SWITCH_PORT_NUM)
        return ENTRY_END_FLAG;

    // If single port, return physical id
    return sg_abyPanelToPhyPortMap[byLogId];
}

UINT8 PORTMPbyPhyIdToLog (UINT8 byPhyId, BOOL bIsLogPtr)
{
    UINT8   si;
    UINT16  u16Cfg;

    // If phy id invalid, return ENTRY_END_FLAG
    if (byPhyId >= SWITCH_PORT_NUM)
        return ENTRY_END_FLAG;

    // Check trunk config of current port
    SWREG_vReadU16(PORTCFG_TRUNK_CRITERIA_BASE + (byPhyId * PORTCFG_PORT_OFFSET), &u16Cfg);

    // If phy id maps to a single port, return log id/pointer of port
    if ((u16Cfg & TRUNK_CFG_ENABLE) == 0) {
        for (si = 0; si < g_byLogIdNum; si++) {
            if (sg_abyPhyToPanelPortMap[byPhyId] == g_abyLogIdList[si] ) {
                if (bIsLogPtr)
                    return si;
                else
                    return g_abyLogIdList[si];
            }
        }
    }

    // If phy id maps to a trunk group, return log id/pointer of group
    else {
        for (si = g_byLogIdNum; si > 0; si--) {
            if (pSPortTrkCfg(u16Cfg)->f4GrpId == (g_abyLogIdList[si-1]- PORTMAP_BASE_TRKGRP_LOG_ID + 1) ) {
                if (bIsLogPtr)
                    return si-1;
                else
                    return g_abyLogIdList[si-1];
            }
        }
    }

    return ENTRY_END_FLAG;
}


//
// Transfer from logical id to physical mask
//
UINT32 PIPORTMP_dwLogIdToPhyMsk (UINT8 byLogId)
{
    UINT8   si = SWITCH_TRUNKABLE_PORT_NUM-1;
    UINT32  dwPhyMsk;
    UINT16  u16Cfg;

    // Handle trunk group
    if (byLogId >= PORTMAP_BASE_TRKGRP_LOG_ID) {
        // Find all members of trunk group in hardware and transfer into physical id mask
        dwPhyMsk = 0;
        while (1) {
            // OR member into physical mask
            SWREG_vReadU16(PORTCFG_TRUNK_CRITERIA_BASE + (si * PORTCFG_PORT_OFFSET), &u16Cfg);
            if (pSPortTrkCfg(u16Cfg)->f4GrpId == (byLogId - PORTMAP_BASE_TRKGRP_LOG_ID + 1) )
                dwPhyMsk |= 0x01;
            // Decide whether or not the loop ends
            if (si > 0) {
                dwPhyMsk <<= 1;
                si--;
            }
            else
                break;
        }
    }
    // Handle single port
    else {
        dwPhyMsk = 0x01;
        dwPhyMsk <<= sg_abyPanelToPhyPortMap[byLogId];
    }
    return dwPhyMsk;
}


//
// Transfer between logical id/ptr mask and physical mask
//
UINT32 PORTMPdwLogMskToPhyMsk (UINT32 dwLogMsk, BOOL bIsLogPtrMsk)
{
    UINT32  dwPhyMsk = 0;
    UINT8   si;

    for (si = 0; si < SWITCH_PORT_NUM + SWITCH_TRUNK_GRP_NUM; si++) {
        if (dwLogMsk & 0x00000001 ) {
            if (bIsLogPtrMsk)
                dwPhyMsk |= PIPORTMP_dwLogPtrToPhyMsk(si);
            else
                dwPhyMsk |= PIPORTMP_dwLogIdToPhyMsk(si);
        }
        dwLogMsk >>= 1;
    }
    return dwPhyMsk;
}


#define SHIFT_BUF_32_BIT    0x00000001      // Used only in this function
UINT32 PORTMPdwPhyMskToLogMsk (UINT32 dwPhyMsk, BOOL bIsLogPtrMsk)
{
    UINT32  dwLogMsk = 0;
    UINT8   si;

    for (si = 0; si < SWITCH_PORT_NUM; si++) {
        if (dwPhyMsk & 0x00000001 ) {
            if (bIsLogPtrMsk)
                dwLogMsk |= ( SHIFT_BUF_32_BIT << PIPORTMP_byPhyIdToLogPtr(si) );
            else
                dwLogMsk |= ( SHIFT_BUF_32_BIT << PIPORTMP_byPhyIdToLogId(si) );
        }
        dwPhyMsk >>= 1;
    }
    return dwLogMsk;
}


//
// Update logical id list
//
void PIPORTMP_vUpdateLogIdList (void)
{
    UINT8   byLogPtr = 0, si;
    UINT8   byModTrkLogPtr = 0, byModTrkGrpId = 0xFF;
    UINT16  u16Tmp, u16ValidGrpMsk = 0;

    g_bIsModuleTrk = FALSE;
    
    // Add single ports into mapping array
    for (si = 0; si < UI_SWITCH_TRUNKABLE_PORT_NUM; si++) {
        SWREG_vReadU16(PORTCFG_TRUNK_CRITERIA_BASE + (sg_abyPanelToPhyPortMap[si] * PORTCFG_PORT_OFFSET), &u16Tmp);

        if ((u16Tmp & TRUNK_CFG_ENABLE) == 0) {       // If single port, put panel id directly
            if (si < SWITCH_GIGA_PORT_ID_BASE) {
                g_abyLogIdList[byLogPtr] = si;
                byLogPtr++;
                g_abyModTrkLogIdList[byModTrkLogPtr] = si;
                byModTrkLogPtr++;
            }
        }
        else {                    // If trunk group, log it
            u16ValidGrpMsk |= ( 0x01 << (pSPortTrkCfg(u16Tmp)->f4GrpId - MIN_TRK_GRP_ID) );
            if (si >= SWITCH_GIGA_PORT_ID_BASE) {
                byModTrkGrpId = (pSPortTrkCfg(u16Tmp)->f4GrpId - MIN_TRK_GRP_ID);
                g_bIsModuleTrk = TRUE;
            }
        }
    }   

    // Log single mega port number
    g_bySingleMegaLogIdNum = byLogPtr;

    // Add trunk groups into mapping array
    u16Tmp = 0x0001;

    for (si = 0; si < SWITCH_TRUNK_GRP_NUM; si++) {
        if (u16ValidGrpMsk & u16Tmp ) {
            g_abyLogIdList[byLogPtr] = PORTMAP_BASE_TRKGRP_LOG_ID + si;
            byLogPtr++;
            if (byModTrkGrpId != si) {   
                g_abyModTrkLogIdList[byModTrkLogPtr] = PORTMAP_BASE_TRKGRP_LOG_ID + si;
                byModTrkLogPtr++;
            }
        }
        u16Tmp <<= 1;
    }

    g_byMegaLogIdNum = byLogPtr;
    g_byModTrkMegaLogIdNum = byModTrkLogPtr;

    for (si = 0; si < SWITCH_GIGA_PORT_NUM; si++) {
        if (PIMOD_byGetModuleType(si) != MOD_CARD_NA ) {
            if (!g_bIsModuleTrk) {
                g_abyLogIdList[byLogPtr] = SWITCH_GIGA_PORT_ID_BASE + si;
                byLogPtr++;
            }
            g_abyModTrkLogIdList[byModTrkLogPtr] = SWITCH_GIGA_PORT_ID_BASE + si;
            byModTrkLogPtr++;
        }
    }

    // Add end of group into mapping array
    g_byLogIdNum = byLogPtr;
    for (; byLogPtr < SWITCH_PORT_NUM; byLogPtr++)
        g_abyLogIdList[byLogPtr] = ENTRY_END_FLAG;

    g_byModTrkLogIdNum = byModTrkLogPtr;
    for (; byModTrkLogPtr < SWITCH_PORT_NUM; byModTrkLogPtr++)
        g_abyModTrkLogIdList[byModTrkLogPtr] = ENTRY_END_FLAG;

}


//
// check if is trunked port by logical ptr
//
BOOL PIPORTMP_bIsTrunkedByLogPtr (UINT8 byLogPtr)
{
    if (g_abyLogIdList[byLogPtr] >= PORTMAP_BASE_TRKGRP_LOG_ID) 
        return TRUE;
    else
        return FALSE;   
}