ixperfprofacc.h

AMCC POWERPC 44X系列的U-BOOT文件

/**
 * @file IxPerfProfAcc.h
 *
 * @brief  Header file for the IXP400 Perf Prof component (IxPerfProfAcc)
 *
 * 
 * @par
 * IXP400 SW Release version 2.0
 * 
 * -- Copyright Notice --
 * 
 * @par
 * Copyright 2001-2005, Intel Corporation.
 * All rights reserved.
 * 
 * @par
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the Intel Corporation nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 * 
 * @par
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 * 
 * @par
 * -- End of Copyright Notice --
 */

/**
 * @defgroup IxPerfProfAcc IXP400 Performance Profiling (IxPerfProfAcc) API 
 *
 * @brief IXP400 Performance Profiling Utility component Public API. 
 * @li NOTE: Xcycle measurement is not supported in Linux.
 *
 *
 * @{
 */
#ifndef IXPERFPROFACC_H
#define IXPERFPROFACC_H

#include "IxOsal.h"

#ifdef __linux
#include <linux/proc_fs.h>
#endif

/*
 * Section for #define
 */
/**
 * @ingroup IxPerfProfAcc
 *
 * @def IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES
 *
 * @brief This is the maximum number of profiling samples allowed, which can be
 * modified according to the user's discretion
 */
#define IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES	0xFFFF

/**
 * @ingroup IxPerfProfAcc
 *
 * @def IX_PERFPROF_ACC_BUS_PMU_MAX_PECS      
 *
 * @brief This is the maximum number of Programmable Event Counters available. 
 *        This is a hardware specific and fixed value. Do not change.
 *        
 */
#define IX_PERFPROF_ACC_BUS_PMU_MAX_PECS        7

/**  
 * @ingroup IxPerfProfAcc
 *
 * @def IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS
 *
 * @brief Max number of measurement allowed. This constant is used when 
 *        creating storage array for Xcycle. When run in continuous mode,  
 *        Xcycle will wrap around and re-use buffer. 
 */
#define IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS 600

#ifdef __linux
/**
 * @ingroup IxPerfProfAcc
 *
 * @def IX_PERFPROF_ACC_XSCALE_PMU_SYMBOL_ACCURACY
 *
 * @brief Level of accuracy required for matching the PC Address to
 *        symbol address. This is used when the XScale PMU time/event
 *        sampling functions get the PC address and search for the 
 *        corresponding symbol address.
 */
#define IX_PERFPROF_ACC_XSCALE_PMU_SYMBOL_ACCURACY 0xffff

#endif /*__linux*/

/**  
 * @ingroup IxPerfProfAcc
 *
 * @def IX_PERFPROF_ACC_LOG
 *
 * @brief Mechanism for logging a formatted message for the PerfProfAcc component
 *
 * @param level UINT32 [in] - trace level
 * @param device UINT32 [in] - output device
 * @param str char* [in] - format string, similar to printf().
 * @param a UINT32 [in] - first argument to display
 * @param b UINT32 [in] - second argument to display
 * @param c UINT32 [in] - third argument to display
 * @param d UINT32 [in] - fourth argument to display
 * @param e UINT32 [in] - fifth argument to display
 * @param f UINT32 [in] - sixth argument to display
 *
 * @return none
 */
#ifndef NDEBUG
#define IX_PERFPROF_ACC_LOG(level, device, str, a, b, c, d, e, f)\
             (ixOsalLog (level, device, str, a, b, c, d, e, f))
#else /*do nothing*/
#define IX_PERFPROF_ACC_LOG(level, device, str, a, b, c, d, e, f) 
#endif /*ifdef NDEBUG */

/*
 * Section for struct
 */

/**
 * @brief contains summary of samples taken 
 * 
 * Structure contains all details of each program counter value - frequency 
 * that PC occurs 
 */
typedef struct
{
	UINT32 programCounter;  /**<the program counter value of the sample*/
	UINT32 freq;		/**<the frequency of the occurence of the sample*/
} IxPerfProfAccXscalePmuSamplePcProfile;

/**
 * @brief contains results of a counter
 *
 * Structure contains the results of a counter, which are split into the lower 
 * and upper 32 bits of the final count
 */
typedef struct
{
    UINT32 lower32BitsEventCount; /**<lower 32bits value of the event counter*/        
    UINT32 upper32BitsEventCount; /**<upper 32bits value of the event counter*/
}   IxPerfProfAccXscalePmuEvtCnt;

/**
 * @brief contains results of counters and their overflow 
 * 
 * Structure contains all values of counters and associated overflows.  The 
 * specific event and clock counters are determined by the user
 */
typedef struct
{
    UINT32 clk_value;           /**<current value of clock counter*/                 
    UINT32 clk_samples;        /**<number of clock counter overflows*/
    UINT32 event1_value;        /**<current value of event 1 counter*/    
    UINT32 event1_samples;     /**<number of event 1 counter overflows*/
    UINT32 event2_value;        /**<current value of event 2 counter*/
    UINT32 event2_samples;     /**<number of event 2 counter overflows*/
    UINT32 event3_value;        /**<current value of event 3 counter*/
    UINT32 event3_samples;     /**<number of event 3 counter overflows*/
    UINT32 event4_value;        /**<current value of event 4 counter*/
    UINT32 event4_samples;     /**<number of event 4 counter overflows*/
} IxPerfProfAccXscalePmuResults;

/** 
 * 
 * @brief Results obtained from Xcycle run 
 */ 
typedef struct 
{
    float maxIdlePercentage; 		/**<maximum percentage of Idle cycles*/
    float minIdlePercentage; 		/**<minimum percentage of Idle cycles*/
    float aveIdlePercentage;		/**<average percentage of Idle cycles*/
    UINT32 totalMeasurements;		/**<total number of measurement made */
} IxPerfProfAccXcycleResults; 

/**
 *
 * @brief Results obtained from running the Bus Pmu component. The results
 *        are obtained when the get functions is called.
 *        
 */
typedef struct
{
    UINT32 statsToGetLower27Bit[IX_PERFPROF_ACC_BUS_PMU_MAX_PECS]; /**<Lower 27 Bit of counter value */
    UINT32 statsToGetUpper32Bit[IX_PERFPROF_ACC_BUS_PMU_MAX_PECS]; /**<Upper 32 Bit of counter value */
} IxPerfProfAccBusPmuResults;

/*
 * Section for enum
 */

/**
 * @ingroup IxPerfProfAcc
 * 
 * @enum IxPerfProfAccBusPmuEventCounters1
 *
 * @brief Type of bus pmu events supported on PEC 1.
 *
 * Lists all bus pmu events.  
 */
typedef enum
{
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEA_GRANT_SELECT = 1, /**< Select North NPEA grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEB_GRANT_SELECT, /**< Select North NPEB grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEC_GRANT_SELECT, /**< Select North NPEC grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_BUS_IDLE_SELECT, /**< Select North bus idle on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEA_REQ_SELECT, /**< Select North NPEA req on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEB_REQ_SELECT, /**< Select North NPEB req on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEC_REQ_SELECT, /**< Select North NPEC req on PEC1*/

	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_GSKT_GRANT_SELECT, /**< Select south gasket grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_ABB_GRANT_SELECT, /**< Select south abb grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_PCI_GRANT_SELECT, /**< Select south pci grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_APB_GRANT_SELECT, /**< Select south apb grant on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_GSKT_REQ_SELECT, /**< Select south gasket request on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_ABB_REQ_SELECT, /**< Select south abb request on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_PCI_REQ_SELECT, /**< Select south pci request on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_APB_REQ_SELECT, /**< Select south apb request on PEC1*/

	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_0_HIT_SELECT, /**< Select sdram0 hit on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_1_HIT_SELECT, /**< Select sdram1 hit on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_2_HIT_SELECT, /**< Select sdram2 hit on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_4_MISS_SELECT, /**< Select sdram4 miss on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_5_MISS_SELECT, /**< Select sdram5 miss on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_6_MISS_SELECT, /**< Select sdram6 miss on PEC1*/
	IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_7_MISS_SELECT /**< Select sdram7 miss on PEC1*/
} IxPerfProfAccBusPmuEventCounters1;

/**
 * @ingroup IxPerfProfAcc
 *
 * @enum IxPerfProfAccBusPmuEventCounters2
 *
 * @brief Type of bus pmu events supported on PEC 2.
 *
 * Lists all bus pmu events.
 */
typedef enum
{
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEA_XFER_SELECT = 24, /**< Select North NPEA transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEB_XFER_SELECT, /**< Select North NPEB transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEC_XFER_SELECT, /**< Select North NPEC transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_BUS_WRITE_SELECT, /**< Select North bus write on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEA_OWN_SELECT, /**< Select North NPEA own on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEB_OWN_SELECT, /**< Select North NPEB own on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEC_OWN_SELECT, /**< Select North NPEC own on PEC2*/

	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_GSKT_XFER_SELECT, /**< Select South gasket transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_ABB_XFER_SELECT, /**< Select South abb transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_PCI_XFER_SELECT, /**< Select South pci transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_APB_XFER_SELECT, /**< Select South apb transfer on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_GSKT_OWN_SELECT, /**< Select South gasket own on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_ABB_OWN_SELECT, /**< Select South abb own on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_PCI_OWN_SELECT, /**< Select South pci own on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_APB_OWN_SELECT, /**< Select South apb own transfer on PEC2*/

	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_1_HIT_SELECT, /**< Select sdram1 hit on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_2_HIT_SELECT, /**< Select sdram2 hit on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_4_HIT_SELECT, /**< Select sdram4 hit on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_5_MISS_SELECT, /**< Select sdram5 miss on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_6_MISS_SELECT, /**< Select sdram6 miss on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_7_MISS_SELECT, /**< Select sdram7 miss on PEC2*/
	IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_0_MISS_SELECT /**< Select sdram0 miss on PEC2*/
} IxPerfProfAccBusPmuEventCounters2;

/**
 * @ingroup IxPerfProfAcc
 *
 * @enum IxPerfProfAccBusPmuEventCounters3
 *
 * @brief Type of bus pmu events supported on PEC 3.
 *
 * Lists all bus pmu events.
 */
typedef enum
{
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEA_RETRY_SELECT = 47, /**< Select north NPEA retry on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEB_RETRY_SELECT, /**< Select north NPEB retry on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEC_RETRY_SELECT, /**< Select north NPEC retry on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_BUS_READ_SELECT, /**< Select north bus read on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEA_WRITE_SELECT, /**< Select north NPEA write on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEB_WRITE_SELECT, /**< Select north NPEB write on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEC_WRITE_SELECT, /**< Select north NPEC wirte on PEC3*/

	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_GSKT_RETRY_SELECT, /**< Select south gasket retry on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_ABB_RETRY_SELECT, /**< Select south abb retry on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_PCI_RETRY_SELECT, /**< Select south pci retry on PEC3*/
	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_APB_RETRY_SELECT, /**< Select south apb retry on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_GSKT_WRITE_SELECT, /**< Select south gasket write on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_ABB_WRITE_SELECT, /**< Select south abb write on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_PCI_WRITE_SELECT, /**< Select south pci write on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_APB_WRITE_SELECT, /**< Select south apb write on PEC3*/

 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_2_HIT_SELECT, /**< Select sdram2 hit on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_4_HIT_SELECT, /**< Select sdram4 hit on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_5_HIT_SELECT, /**< Select sdram5 hit on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_6_MISS_SELECT, /**< Select sdram6 miss on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_7_MISS_SELECT, /**< Select sdram7 miss on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_0_MISS_SELECT, /**< Select sdram0 miss on PEC3*/
 	IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_1_MISS_SELECT /**< Select sdram1 miss on PEC3*/
} IxPerfProfAccBusPmuEventCounters3;

/**
 * @ingroup IxPerfProfAcc
 *
 * @enum IxPerfProfAccBusPmuEventCounters4
 *
 * @brief Type of bus pmu events supported on PEC 4.
 *
 * Lists all bus pmu events.
 */
typedef enum
{