ixnpemhconfig.c

AMCC POWERPC 44X系列的U-BOOT文件

    IxNpeMhConfigIsr isr)
{
    IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
                     "ixNpeMhConfigIsrRegister\n");

    /* check if there is already an ISR registered for this NPE */
    if (ixNpeMhConfigNpeInfo[npeId].isr != NULL)
    {
        IX_NPEMH_TRACE0 (IX_NPEMH_DEBUG, "Over-writing registered NPE ISR\n");
    }

    /* save the ISR routine with the NPE info */
    ixNpeMhConfigNpeInfo[npeId].isr = isr;

    IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
                     "ixNpeMhConfigIsrRegister\n");
}

/*
 * Function definition: ixNpeMhConfigNpeInterruptEnable
 */

BOOL ixNpeMhConfigNpeInterruptEnable (
    IxNpeMhNpeId npeId)
{
    UINT32 ofe;
    volatile UINT32 *controlReg =
        (UINT32 *)ixNpeMhConfigNpeInfo[npeId].controlRegister;

    /* get the OFE (OutFifoEnable) bit of the control register */
    IX_NPEMH_REGISTER_READ_BITS (controlReg, &ofe, IX_NPEMH_NPE_CTL_OFE);

    /* if the interrupt is disabled then we must enable it */
    if (!ofe)
    {
        /* set the OFE (OutFifoEnable) bit of the control register */
        /* we must set the OFEWE (OutFifoEnableWriteEnable) at the same */
        /* time for the write to have effect */
        IX_NPEMH_REGISTER_WRITE_BITS (controlReg,
                                      (IX_NPEMH_NPE_CTL_OFE |
                                       IX_NPEMH_NPE_CTL_OFEWE),
                                      (IX_NPEMH_NPE_CTL_OFE |
                                       IX_NPEMH_NPE_CTL_OFEWE));
    }

    /* return the previous state of the interrupt */
    return (ofe != 0);
}

/*
 * Function definition: ixNpeMhConfigNpeInterruptDisable
 */

BOOL ixNpeMhConfigNpeInterruptDisable (
    IxNpeMhNpeId npeId)
{
    UINT32 ofe;
    volatile UINT32 *controlReg =
        (UINT32 *)ixNpeMhConfigNpeInfo[npeId].controlRegister;

    /* get the OFE (OutFifoEnable) bit of the control register */
    IX_NPEMH_REGISTER_READ_BITS (controlReg, &ofe, IX_NPEMH_NPE_CTL_OFE);

    /* if the interrupt is enabled then we must disable it */
    if (ofe)
    {
        /* unset the OFE (OutFifoEnable) bit of the control register */
        /* we must set the OFEWE (OutFifoEnableWriteEnable) at the same */
        /* time for the write to have effect */
        IX_NPEMH_REGISTER_WRITE_BITS (controlReg,
                                      (0                    |
                                       IX_NPEMH_NPE_CTL_OFEWE),
                                      (IX_NPEMH_NPE_CTL_OFE |
                                       IX_NPEMH_NPE_CTL_OFEWE));
    }

    /* return the previous state of the interrupt */
    return (ofe != 0);
}

/*
 * Function definition: ixNpeMhConfigMessageIdGet
 */

IxNpeMhMessageId ixNpeMhConfigMessageIdGet (
    IxNpeMhMessage message)
{
    /* return the most-significant byte of the first word of the */
    /* message */
    return ((IxNpeMhMessageId) ((message.data[0] >> 24) & 0xFF));
}

/*
 * Function definition: ixNpeMhConfigNpeIdIsValid
 */

BOOL ixNpeMhConfigNpeIdIsValid (
    IxNpeMhNpeId npeId)
{
    /* check that the npeId parameter is within the range of valid IDs */
    return (npeId >= 0 && npeId < IX_NPEMH_NUM_NPES);
}

/*
 * Function definition: ixNpeMhConfigLockGet
 */

void ixNpeMhConfigLockGet (
    IxNpeMhNpeId npeId)
{
    IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
                     "ixNpeMhConfigLockGet\n");

    /* lock the mutex for this NPE */
    (void) ixOsalMutexLock (&ixNpeMhConfigNpeInfo[npeId].mutex, 
			    IX_OSAL_WAIT_FOREVER);

    /* disable the NPE's "outFIFO not empty" interrupt */
    ixNpeMhConfigNpeInfo[npeId].oldInterruptState =
        ixNpeMhConfigNpeInterruptDisable (npeId);

    IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
                     "ixNpeMhConfigLockGet\n");
}

/*
 * Function definition: ixNpeMhConfigLockRelease
 */

void ixNpeMhConfigLockRelease (
    IxNpeMhNpeId npeId)
{
    IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
                     "ixNpeMhConfigLockRelease\n");

    /* if the interrupt was previously enabled */
    if (ixNpeMhConfigNpeInfo[npeId].oldInterruptState)
    {
        /* enable the NPE's "outFIFO not empty" interrupt */
        ixNpeMhConfigNpeInfo[npeId].oldInterruptState =
            ixNpeMhConfigNpeInterruptEnable (npeId);
    }

    /* unlock the mutex for this NPE */
    (void) ixOsalMutexUnlock (&ixNpeMhConfigNpeInfo[npeId].mutex);

    IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
                     "ixNpeMhConfigLockRelease\n");
}

/*
 * Function definition: ixNpeMhConfigInFifoWrite
 */

IX_STATUS ixNpeMhConfigInFifoWrite (
    IxNpeMhNpeId npeId,
    IxNpeMhMessage message)
{
    volatile UINT32 *npeInFifo =
        (UINT32 *)ixNpeMhConfigNpeInfo[npeId].inFifoRegister;
    UINT32 retriesCount = 0;

    /* write the first word of the message to the NPE's inFIFO */
    IX_NPEMH_REGISTER_WRITE (npeInFifo, message.data[0]);

    /* need to wait for room to write second word - see SCR #493,
       poll for maximum number of retries, if exceed maximum
       retries, exit from while loop */
    while ((IX_NPE_MH_MAX_NUM_OF_RETRIES > retriesCount)
        && ixNpeMhConfigInFifoIsFull (npeId))
    {
        retriesCount++;
    }

    /* Return TIMEOUT status to caller, indicate that NPE Hang / Halt */
    if (IX_NPE_MH_MAX_NUM_OF_RETRIES == retriesCount)
    {
        return IX_NPEMH_CRITICAL_NPE_ERR;   
    }    
    
    /* write the second word of the message to the NPE's inFIFO */
    IX_NPEMH_REGISTER_WRITE (npeInFifo, message.data[1]);

    /* record in the stats the maximum number of retries needed */
    if (ixNpeMhConfigStats[npeId].maxInFifoFullRetries < retriesCount)
    {
	ixNpeMhConfigStats[npeId].maxInFifoFullRetries = retriesCount;
    }

    /* update statistical info */
    ixNpeMhConfigStats[npeId].inFifoWrites++;
    
    return IX_SUCCESS;
}

/*
 * Function definition: ixNpeMhConfigOutFifoRead
 */

IX_STATUS ixNpeMhConfigOutFifoRead (
    IxNpeMhNpeId npeId,
    IxNpeMhMessage *message)
{
    volatile UINT32 *npeOutFifo =
        (UINT32 *)ixNpeMhConfigNpeInfo[npeId].outFifoRegister;
    UINT32 retriesCount = 0;

    /* read the first word of the message from the NPE's outFIFO */
    IX_NPEMH_REGISTER_READ (npeOutFifo, &message->data[0]);

    /* need to wait for NPE to write second word - see SCR #493 
       poll for maximum number of retries, if exceed maximum
       retries, exit from while loop */
    while ((IX_NPE_MH_MAX_NUM_OF_RETRIES > retriesCount)
        && ixNpeMhConfigOutFifoIsEmpty (npeId))
    {
        retriesCount++;
    }

    /* Return TIMEOUT status to caller, indicate that NPE Hang / Halt */
    if (IX_NPE_MH_MAX_NUM_OF_RETRIES == retriesCount)
    {
        return IX_NPEMH_CRITICAL_NPE_ERR;   
    } 
    
    /* read the second word of the message from the NPE's outFIFO */
    IX_NPEMH_REGISTER_READ (npeOutFifo, &message->data[1]);

    /* record in the stats the maximum number of retries needed */
    if (ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries < retriesCount)
    {
	ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries = retriesCount;
    }

    /* update statistical info */
    ixNpeMhConfigStats[npeId].outFifoReads++;
    
    return IX_SUCCESS;
}

/*
 * Function definition: ixNpeMhConfigShow
 */

void ixNpeMhConfigShow (
    IxNpeMhNpeId npeId)
{
    /* show the message fifo read counter */
    IX_NPEMH_SHOW ("Message FIFO reads",
                   ixNpeMhConfigStats[npeId].outFifoReads);

    /* show the message fifo write counter */
    IX_NPEMH_SHOW ("Message FIFO writes",
                   ixNpeMhConfigStats[npeId].inFifoWrites);

    /* show the max retries performed when inFIFO full */
    IX_NPEMH_SHOW ("Max inFIFO Full retries",
		   ixNpeMhConfigStats[npeId].maxInFifoFullRetries);

    /* show the max retries performed when outFIFO empty */
    IX_NPEMH_SHOW ("Max outFIFO Empty retries",
		   ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries);

    /* show the current status of the inFifo */
    ixOsalLog (IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT,
	       "InFifo is %s and %s\n",
	       (ixNpeMhConfigInFifoIsEmpty (npeId) ? 
		(int) "EMPTY" : (int) "NOT EMPTY"),
	       (ixNpeMhConfigInFifoIsFull (npeId) ? 
		(int) "FULL" : (int) "NOT FULL"),
	       0, 0, 0, 0);

    /* show the current status of the outFifo */
    ixOsalLog (IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT,
	       "OutFifo is %s and %s\n",
	       (ixNpeMhConfigOutFifoIsEmpty (npeId) ? 
		(int) "EMPTY" : (int) "NOT EMPTY"),
	       (ixNpeMhConfigOutFifoIsFull (npeId) ? 
		(int) "FULL" : (int) "NOT FULL"),
	       0, 0, 0, 0);
}

/*
 * Function definition: ixNpeMhConfigShowReset
 */

void ixNpeMhConfigShowReset (
    IxNpeMhNpeId npeId)
{
    /* reset the message fifo read counter */
    ixNpeMhConfigStats[npeId].outFifoReads = 0;

    /* reset the message fifo write counter */
    ixNpeMhConfigStats[npeId].inFifoWrites = 0;

    /* reset the max inFIFO Full retries counter */
    ixNpeMhConfigStats[npeId].maxInFifoFullRetries = 0;

    /* reset the max outFIFO empty retries counter */
    ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries = 0;
}