lh79524_dma_driver.c

SHARP_ARM720T_LH79524/5软件开发包_支持TFT_LCD_NAND_FLASH_ETH_USB

                {
                    switch(arg)
                    {
                        case 1:
                            DMAC->stream2.ctrl |= DMAC_CTRL_DESIZE_1BYTE;
                            break;
                        case 2:
                            DMAC->stream2.ctrl |= DMAC_CTRL_DESIZE_2BYTE;
                            break;
                        case 4:
                            DMAC->stream2.ctrl |= DMAC_CTRL_DESIZE_4BYTE;
                            break;
                        default:
                            status = _ERROR;
                    }
                }
                else if (dma_ext_channel == 1)
                {
                    switch(arg)
                    {
                        case 1:
                            DMAC->stream3.ctrl |= DMAC_CTRL_DESIZE_1BYTE;
                            break;
                        case 2:
                            DMAC->stream3.ctrl |= DMAC_CTRL_DESIZE_2BYTE;
                            break;
                        case 4:
                            DMAC->stream3.ctrl |= DMAC_CTRL_DESIZE_4BYTE;
                            break;
                        default:
                            status = _ERROR;
                    }
                }
                else
                {
                    status = _ERROR;
                }
                 break;
            
            /* Set DMA transfer burst length - must be 1, 4, 8, 16
            1 for single, 4 for 4 increamenting, 8 for 8 increamenting,
            16 for 16 increamenting */
            case DMA_SET_EXT_BURST_LEN:
                if (dma_ext_channel == 0)
                {
                    switch(arg)
                    {
                        case 1:
                            DMAC->stream2.ctrl |= DMAC_CTRL_SOBURST_SINGLE;
                            break;
                        case 4:
                            DMAC->stream2.ctrl |= DMAC_CTRL_SOBURST_4INC;
                            break;
                        case 8:
                            DMAC->stream2.ctrl |= DMAC_CTRL_SOBURST_8INC;
                            break;
                        case 16:
                            DMAC->stream2.ctrl |= DMAC_CTRL_SOBURST_16INC;
                            break;
                        default:
                            status = _ERROR;
                    }
                }
                else if (dma_ext_channel == 1)
                {
                    switch(arg)
                    {
                        case 1:
                            DMAC->stream3.ctrl |= DMAC_CTRL_SOBURST_SINGLE;
                            break;
                        case 4:
                            DMAC->stream3.ctrl |= DMAC_CTRL_SOBURST_4INC;
                            break;
                        case 8:
                            DMAC->stream3.ctrl |= DMAC_CTRL_SOBURST_8INC;
                            break;
                        case 16:
                            DMAC->stream3.ctrl |= DMAC_CTRL_SOBURST_16INC;
                            break;
                        default:
                            status = _ERROR;
                    }
                }
                else
                {
                    status = _ERROR;
                }
                 break;
                 
            /* DMA external set current source register increamented.
            arg = 1, increamented, arg = 0, unchanged */
            case DMA_SET_SO_INC:
                if (dma_ext_channel == 0)
                {
	                if(arg == 1)
	                {
		                /* current source register increamented */
	                    DMAC->stream2.ctrl |= DMAC_CTRL_SOINC;
	                }
	                else
	                {
		                /* current source register unchanged */
	                    DMAC->stream2.ctrl &= ~DMAC_CTRL_SOINC;
	                }
                }
                else if (dma_ext_channel == 1)
                {
	                if(arg == 1)
	                {
		                /* current source register increamented */
	                    DMAC->stream3.ctrl |= DMAC_CTRL_SOINC;
	                }
	                else
	                {
		                /* current source register unchanged */
	                    DMAC->stream3.ctrl &= ~DMAC_CTRL_SOINC;
	                }
                }
                else
                {
                    status = _ERROR;
                }
                 break;
                 
            /* DMA external set current destination register increamented.
            arg = 1, increamented, arg = 0, unchanged */
            case DMA_SET_DE_INC:
                if (dma_ext_channel == 0)
                {
	                if(arg == 1)
	                {
		                /* current source register increamented */
	                    DMAC->stream2.ctrl |= DMAC_CTRL_DEINC;
	                }
	                else
	                {
		                /* current source register unchanged */
	                    DMAC->stream2.ctrl &= ~DMAC_CTRL_DEINC;
	                }
                }
                else if (dma_ext_channel == 1)
                {
	                if(arg == 1)
	                {
		                /* current source register increamented */
	                    DMAC->stream3.ctrl |= DMAC_CTRL_DEINC;
	                }
	                else
	                {
		                /* current source register unchanged */
	                    DMAC->stream3.ctrl &= ~DMAC_CTRL_DEINC;
	                }
                }
                else
                {
                    status = _ERROR;
                }
                 break;
                 
            /* DMA start external transfer, arg = 1, enable. 
            arg = 0, disable */
            case DMA_ENABLE_EXT:
                if (dma_ext_channel == 0)
                {
	                /* Enable the external DMA - channel 0 */
	                if(arg == 1)
	                {
                    	/* clear any previous DMA flags */
                    	DMAC->clear = (DMAC_ERROR2 | DMAC_EOT2);
                    
                    	DMAC->stream2.ctrl |= DMAC_CTRL_ADDR_MODE_WRAP;

                    	DMAC->stream2.ctrl |= DMAC_CTRL_ENABLE;
                    }
                    /* Disable the external DMA - channel 0*/
                    else
                    {
                    	DMAC->clear = (DMAC_ERROR2 | DMAC_EOT2);
                    
                        DMAC->stream2.ctrl &= ~DMAC_CTRL_ENABLE;
                    }
                }
                else if (dma_ext_channel == 1)
                {
	                /* Enable the external DMA - channel 1 */
	                if(arg == 1)
	                {
	                    /* clear any previous DMA flags */
    	                DMAC->clear = (DMAC_ERROR3 | DMAC_EOT3);
                    
        	            DMAC->stream3.ctrl |= DMAC_CTRL_ADDR_MODE_WRAP;
	
    	                DMAC->stream3.ctrl |= DMAC_CTRL_ENABLE;
    	            }
                    /* Disable the external DMA - channel 1 */
    	            else
    	            {
                    	DMAC->clear = (DMAC_ERROR3 | DMAC_EOT3);
                    
                        DMAC->stream3.ctrl &= ~DMAC_CTRL_ENABLE;
    	            }
                }
                else
                {
                    status = _ERROR;
                }
                 break;
                 
            /* Get DMA status, status = 
                DMAC_EOT0
                DMAC_EOT1
                DMAC_EOT2
                DMAC_EOT3
                DMAC_ERROR0
                DMAC_ERROR1
                DMAC_ERROR2
                DMAC_ERROR3
                DMAC_ACTIVE0 
                DMAC_ACTIVE1 
                DMAC_ACTIVE2 
                DMAC_ACTIVE3 
            */          
            case DMA_GET_STATUS:
                status = (DMAC->status & 0x0fff);   

                 break;

            default:
                /* Unsupported parameter */
                status = _ERROR;
        }
    }

    return status;
}

/***********************************************************************
 *
 * Function: dma_read
 *
 * Purpose: DMA read function (stub only)
 *
 * Processing:
 *     Return 0 to the caller.
 *
 * Parameters:
 *     devid:     Pointer to DMA config structure
 *     buffer:    Pointer to data buffer to copy to
 *     max_bytes: Number of bytes to read
 *
 * Outputs: None
 *
 * Returns: Number of bytes actually read (always 0)
 *
 * Notes: None
 *
 **********************************************************************/
INT_32 dma_read(INT_32 devid,
                void *buffer,
                INT_32 max_bytes)
{
    return 0;
}

/***********************************************************************
 *
 * Function: dma_write
 *
 * Purpose: DMA write function (stub only)
 *
 * Processing:
 *     Return 0 to the caller.
 *
 * Parameters:
 *     devid: Pointer to DMA config structure
 *     buffer:  Pointer to data buffer to copy from
 *     n_bytes: Number of bytes to write
 *
 * Outputs: None
 *
 * Returns: Number of bytes actually written (always 0)
 *
 * Notes: None
 *
 **********************************************************************/
INT_32 dma_write(INT_32 devid,
                 void *buffer,
                 INT_32 n_bytes)
{
    return 0;
}