lh79524_ssp_driver.c

SHARP_ARM720T_LH79524/5软件开发包_支持TFT_LCD_NAND_FLASH_ETH_USB

        /* disable SSP DMA interrupts and transfer requests */
        /* set control registers to their reset defaults */
        SSP->ctrl1 = 0; 
        SSP->ctrl0 = 0;
        /* clear any SSP interrupts */
        SSP->icr |= SSP_ICR_RORIC | SSP_ICR_RTIC;

        RCPC->periphclksel &= ~RCPC_PCLKSEL1_SSP_SCOC; /* source is hclk */
        RCPC->sspclkprescale = 0; /* as fast as possible */
        RCPC->periphclkctrl1 &= ~RCPC_CLKCTRL1_SSP_DISABLE; /* enable ssp clock */
        SSP->cpsr = 2;  /* this is the minimum legal value */
        /* 
        flush the FIFOs--SSP toggles the data out, clock, frame and enable
        signals at the GPIO MUX but not at the pins because the SSP pins
        are switched to alternate functions (GPIO or serial port)
        */
        SSP->ctrl1 |= SSP_CR1_SSE;
        /* flush transmit fifo */
        /* while if ssp transmit fifo is not empty */
        while ( (SSP->sr & SSP_SR_TFE) == 0);

        /* flush the receive fifo */
        /* while if ssp receive fifo is not empty */
        while ((SSP->sr & SSP_SR_RNE) != 0)
            temp1 = SSP->dr;
        
        /* clear any receive overruns */
        SSP->icr |= SSP_ICR_RORIC | SSP_ICR_RTIC;
        /* disable the SSP again */
        SSP->ctrl1 &= ~SSP_CR1_SSE;
        
        /* mask all the ssp interrupts */
    	SSP->imsc &= ~(SSP_IMSC_RORIM | SSP_IMSC_RTIM | SSP_IMSC_RXIM | SSP_IMSC_TXIM);
    
        /* set mux pin and make GPIO to be SSP pin */
        temp1 = IOCON->mux_ctl_5;
        temp1 &= 0xFF00;
		temp1 |= IOCON_MUX5_SSPTX_I2STXD |
				IOCON_MUX5_SSPRX_I2STXD |
        		IOCON_MUX5_SSPCLK_I2SLCK |
        		IOCON_MUX5_SSPFRM_I2SWS;
        IOCON->mux_ctl_5 = temp1;
        /* SSP is disabled on open */
        
        /* Get system pll value */
        temp1 = SDK79524_XTAL_IN * (RCPC->systempllctrl & 0x3f);
        temp1 = temp1 / ((RCPC->systempllctrl>>6) & 0x3f);
        hclk_freq = temp1/2 * RCPC->hclkprescale;
    }

    return status;
}

/***********************************************************************
 *
 * Function: ssp_close
 *
 * Purpose: Close the SSP controller
 *
 * Processing:
 *     If init is not TRUE, then return _ERROR to the caller as the
 *     device was not previously opened. return
 *     _ERROR to the caller as the device can no longer be
 *     stopped. Otherwise, disable the SSP, set init to
 *     FALSE, and return _NO_ERROR to the caller.
 *
 * Parameters:
 *     devid: Pointer to SSP config structure
 *
 * Outputs: None
 *
 * Returns: The status of the close operation
 *
 * Notes: None
 *
 **********************************************************************/
STATUS ssp_close(INT_32 devid)
{
    SSP_CFG_T *sspcfgptr = (SSP_CFG_T *) devid;
    STATUS status = _ERROR;
    UNS_32 temp1;

    if (sspcfgptr->init == TRUE)
    {
        status = _NO_ERROR;
        sspcfgptr->init = FALSE;
        
        /* disable ssp clock */
        RCPC->periphclkctrl1 |= RCPC_CLKCTRL1_SSP_DISABLE; 

        /* disable SSP DMA interrupts and transfer requests */
        /* set control registers to their reset defaults */
        SSP->ctrl1 = 0; 
        SSP->ctrl0 = 0;
        /* clear any receive overruns */
        SSP->icr |= SSP_ICR_RORIC | SSP_ICR_RTIC;
   
        /* disable the ssp DMA streams */
        DMAC->stream0.max = 0;
        DMAC->stream0.ctrl = 0;
        DMAC->stream1.max = 0;
        DMAC->stream1.ctrl = 0;
        /* clear any previous SSP DMA completions */
        DMAC->clear = DMAC_EOT0 | DMAC_EOT1;
        /* set mux register and make SSP pin to be GPIO */
        /* switch all muxed I/O away from the SSP */
        temp1 = IOCON->mux_ctl_5;
        temp1 &= 0xFF00;
        IOCON->mux_ctl_5 = temp1;    
    }

    return status;
}

/***********************************************************************
 *
 * Function: ssp_ioctl
 *
 * Purpose: SSP configuration block
 *
 * Processing:
 *     This function is a large case block. Based on the passed function
 *     and option values, set or get the appropriate SSP
 *     parameter.
 *
 * Parameters:
 *     devid: Pointer to SSP config structure
 *     cmd:   ioctl command
 *     arg:   ioctl argument
 *
 * Outputs: None
 *
 * Returns: The status of the ioctl operation
 *
 * Notes: None
 *
 **********************************************************************/
STATUS ssp_ioctl(INT_32 devid,
                 INT_32 cmd,
                 INT_32 arg)
{
    SSP_REGS_T *ssp;
    UNS_32 tmp;
    SSP_CFG_T *sspcfgptr = (SSP_CFG_T *) devid;
    STATUS status = _ERROR;

    UNS_32 phys_source;
    UNS_32 phys_dest;
    UNS_16 * destination;
    UNS_16 * source;
    
   
    if (sspcfgptr->init == TRUE)
    {
        status = _NO_ERROR;
        ssp = sspcfgptr->regptr;

        switch (cmd)
        {
            case SSP_ENABLE:
                /* Enable SSP operation and init the SSP controller.
                arg = 1, enable SSP. arg = 0 disable SSP */
                if (arg == 1)
                {
                    /* enable SSP operation */
                    SSP->ctrl1 |= SSP_CR1_SSE;
                }
                else if (arg == 0)
                {
                    /* disable SSP operation */
                    SSP->ctrl1 &= ~SSP_CR1_SSE;
                }
                else
                {
                    status = _ERROR;
                }
                break;
                
            case SSP_SET_SLAVE:
                /* Enable SSP operation in slave mode
                arg = 1, slave mode. arg = 0 master mode */
                if (arg == 1)
                {
                    /* SSP in slave mode */
                    SSP->ctrl1 |= SSP_CR1_MS;
                }
                else if (arg == 0)
                {
                    /* SSP in master mode */
                    SSP->ctrl1 &= ~SSP_CR1_MS;
                }
                else
                {
                    status = _ERROR;
                }
                break;
                                
            case SSP_SET_FRAME_FORMAT:
                /* Set SSP in either National or TI or Motorola mode. arg =
                *   SSP_MODE_NATIONAL   : National microwire frame format
                *   SSP_MODE_TI         : TI synchronous serial data frame format
                *   SSP_MODE_MOTOROLA   : Motorola SPI data frame format
                */
                if (arg == SSP_MODE_NATIONAL)
                {
                    SSP->ctrl0 &= ~(_BIT(4) | _BIT(5));   // clear the bits
                    SSP->ctrl0 |= SSP_CR0_FRF_NS;
                }
                else if (arg == SSP_MODE_TI)
                {
                    SSP->ctrl0 &= ~(_BIT(4) | _BIT(5));   // clear the bits
                    SSP->ctrl0 |= SSP_CR0_FRF_TI;
                }
                else if (arg == SSP_MODE_MOTOROLA)
                {
                    SSP->ctrl0 &= ~(_BIT(4) | _BIT(5));   // clear the bits
                    SSP->ctrl0 |= SSP_CR0_FRF_MOT;
                }
                else
                {
                    status = _ERROR;
                }
                break;
                
            case SSP_SET_DATA_SIZE:
                /* Set SSP frame data size, size is valid from 4 to 16
                arg = data size */
                if ((arg > 16) || (arg < 4))
                {
                    status = _ERROR;
                }
                else
                {
                    SSP->ctrl0 &= ~(_BIT(0) | _BIT(1) | _BIT(2)); // clear the bits
                    SSP->ctrl0 |= (arg-1);
                }
                break;
                
            case SSP_SET_SPEED:
                ssp_set_speed(arg);
                break;
                
            case SSP_SET_SSPFRM_PIN:
                /*  configure the SSPFRM pin to be high, low, 
                or auto during ssp operation. arg =
                *   SSPFRM_AUTO : set up the pin muxing so that the SSP 
                *               controls the SSPFRM pin
                *   SSPFRM_HIGH : set SSPFRM pin as GPIO and set it as high
                *   SSPFRM_LOW  : set SSPFRM pin as GPIO and set it as low
                */
                if(arg == SSPFRM_AUTO)
                {
                	IOCON->mux_ctl_5 &= ~(_BIT(0) | _BIT(1));
                	IOCON->mux_ctl_5 |= IOCON_MUX5_SSPFRM_I2SWS;
                }
                else if (arg == SSPFRM_HIGH)
                {
                    GPIOB->dr |= SSPFRM_GPIO_BIT;
                    GPIOB->ddr |= SSPFRM_GPIO_BIT; /* make GPIO an output */
                    IOCON->mux_ctl_5 &= ~(_BIT(0) | _BIT(1)); /* make SSPFRM pin a GPIO */
                }
                else if (arg == SSPFRM_LOW)
                {
                    GPIOB->dr &= ~SSPFRM_GPIO_BIT;
                    GPIOB->ddr |= SSPFRM_GPIO_BIT; /* make GPIO an output */
                    IOCON->mux_ctl_5 &= ~(_BIT(0) | _BIT(1)); /* make SSPFRM pin a GPIO */
                }
                else
                {
                    status = _ERROR;
                }
                break;
            
            case SSP_SET_SCLK_POLARITY:
                /* invert the sclk signal polarity, only effective 
                in Motorola mode. arg = 1, invert polarity, arg = 0,
                normal polarity */
                if (arg == 1)
                {
                    /* Reverse polarity */
                    SSP->ctrl0 |= SSP_CR0_SPO;
                }
                else if (arg == 0)
                {
                    /* normal polarity */
                    SSP->ctrl0 &= ~SSP_CR0_SPO;
                }
                else
                {
                    status = _ERROR;
                }
                break;
                
            case SSP_SET_SCLK_PHASE:
                /* invert the sclk signal phase, only effective in 
                Motorola mode. arg = 1, invert phrase, arg = 0,
                normal phrase */
                if (arg == 1)
                {
                    /* Reverse phrase */
                    SSP->ctrl0 |= SSP_CR0_SPH;
                }
                else if (arg == 0)
                {
                    /* normal phrase */
                    SSP->ctrl0 &= ~SSP_CR0_SPH;
                }