📄 lh79524_int_driver.c
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/***********************************************************************
* $Workfile: lh79524_int_driver.c $
* $Revision: 1.0 $
* $Author: ZhangJ $
* $Date: Oct 20 2004 09:48:56 $
*
* Project: LH79524 INT driver
*
* Description:
* This file contains driver support for the INT module on the
* LH79524
*
* Revision History:
* $Log: //smaicnt2/pvcs/VM/sharpmcu/archives/sharpmcu/software/csps/lh79524/source/lh79524_int_driver.c-arc $
*
* Rev 1.0 Oct 20 2004 09:48:56 ZhangJ
* Initial revision.
*
* Rev 1.0 Jul 07 2003 16:40:00 LiJ
* Initial revision.
*
* SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
* OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
* AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES,
* SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
*
* SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY
* FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A
* SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
* FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
*
* COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
* CAMAS, WA
*
***********************************************************************/
#include "lh79524_int_driver.h"
#define ALL_SOURCES 0xFFFFFFFF
#define ARM_SWI_VEC 0x08 /* ARM software interrupt vector address */
#define ARM_RESERVED_VEC 0x14 /* ARM reserved vector address */
#define ARM_IRQ_VEC 0x18 /* ARM IRQ vector address */
#define ARM_FIQ_VEC 0x1C /* ARM FIQ vector address */
#define VEC_ADR_SWI 0x20 /* store SWI int handling routine addr */
#define VEC_ADR_FIQ 0x24 /* store FIQ int handling routine addr */
#if !defined NULL
#define NULL (void *)0
#endif
/***********************************************************************
* INT driver private data
**********************************************************************/
/* INT device configuration structure */
STATIC INT_CFG_T irqcfg;
STATIC INT_CFG_T fiqcfg;
STATIC INT_CFG_T swicfg;
/* Global variable for irq device */
static INT_32 dev_irq = 0;
/***********************************************************************
* Driver static data
**********************************************************************/
/* static variable for the VIC source to be executed currently */
static INT_32 irq_current_source = VIC_BAD_SOURCE;
/***********************************************************************
* Forward function declaration
**********************************************************************/
static void int_enable_irq(void);
static void int_enable_fiq(void);
static void int_disable_irq(void);
static void int_disable_fiq(void);
/* Default fiq handling routine */
static void LH79524_default_fiq_handler(void);
/* Default swi handling routine */
static void LH79524_default_swi_handler(void);
/* Default unvectored interruption handling routine */
static void LH79524_default_unvectored_handler(void);
/***********************************************************************
* Global variables
**********************************************************************/
// fiq service handing routine pointer to default fiq handling routine
// it can be changed by the user program to setup user fiq routine
volatile UNS_32 LH79524_fiq_handler_addr =
(UNS_32)LH79524_default_fiq_handler;
// swi service handing routine pointer to default swi handling routine
// it can be changed by the user program to setup user swi routine
volatile UNS_32 LH79524_swi_handler_addr =
(UNS_32)LH79524_default_swi_handler;
/***********************************************************************
* External function declaration
**********************************************************************/
/* irq handler function address */
extern volatile UNS_32 LH79524_irq_handler;
/* ARM irq jump address */
extern volatile UNS_32 LH79524_irq_vec;
/* ARM fiq jump address */
extern volatile UNS_32 LH79524_fiq_vec;
/* ARM swi jump address */
extern volatile UNS_32 LH79524_swi_vec;
/* fiq handler function address */
extern volatile UNS_32 LH79524_fiq_handler;
/* swi handler function address */
extern volatile UNS_32 LH79524_swi_handler;
/***********************************************************************
* INT driver private functions
**********************************************************************/
/**********************************************************************
*
* Function: enable_IRQ, disable_IRQ...
*
* Purpose:
* tool specific inline assembly funtion
*
* Processing:
* enable or disable IRQ or FIQ
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: Not portable code
*
**********************************************************************/
static void int_enable_irq(void)
{
#ifdef __arm
__asm
{
MRS r0, CPSR
BIC r0, r0, #0x80
MSR CPSR_c, r0
}
#else
__asm ("MRS r0, cpsr");
__asm ("BIC r0, r0, #0x80");
__asm ("MSR CPSR_c, r0");
#endif
}
static void int_enable_fiq(void)
{
#ifdef __arm
__asm
{
MRS r0, CPSR
BIC r0, r0, #0x40
MSR CPSR_c, r0
}
#else
__asm ("MRS r0, cpsr");
__asm ("BIC r0, r0, #0x40");
__asm ("MSR CPSR_c, r0");
#endif
}
static void int_disable_irq(void)
{
#ifdef __arm
__asm
{
MRS r0, CPSR
ORR r0, r0, #0x80
MSR CPSR_c, r0
}
#else
__asm ("MRS r0, cpsr");
__asm ("ORR r0, r0, #0x80");
__asm ("MSR CPSR_c, r0");
#endif
}
static void int_disable_fiq(void)
{
#ifdef __arm
__asm
{
MRS r0, CPSR
ORR r0, r0, #0x40
MSR CPSR_c, r0
}
#else
__asm ("MRS r0, cpsr");
__asm ("ORR r0, r0, #0x40");
__asm ("MSR CPSR_c, r0");
#endif
}
/**********************************************************************
*
* Function: LH79524_default_unvectored_handler
*
* Purpose:
* Default unvectored interruption handling routine
*
* Processing: None
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
static void LH79524_default_unvectored_handler(void)
{
}
/**********************************************************************
*
* Function: LH79524_default_fiq_handler
*
* Purpose:
* Default FIQ interruption handling routine
*
* Processing: None
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
static void LH79524_default_fiq_handler(void)
{
}
/**********************************************************************
*
* Function: LH79524_default_swi_handler
*
* Purpose:
* Default SWI interruption handling routine
*
* Processing: None
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
static void LH79524_default_swi_handler(void)
{
}
/***********************************************************************
* INT driver public functions
**********************************************************************/
/***********************************************************************
*
* Function: irq_open
*
* Purpose: Open the IRQ controller
*
* Processing:
* If init is not FALSE, return 0x00000000 to the caller. Otherwise,
* set init to TRUE .
*
* Parameters:
* ipbase: void, pass 0
* arg : Not used
*
* Outputs: None
*
* Returns: The pointer to a IRQ structure or 0
*
* Notes: IRQ is disabled after open, use ioctl to enable IRQ
*
**********************************************************************/
INT_32 irq_open(void *ipbase, INT_32 arg)
{
INT_32 status = 0;
INT_32 priority;
if (irqcfg.init == FALSE)
{
/* Device is valid and not previously initialized */
irqcfg.init = TRUE;
/* Clear VIC registers */
VIC->intenclear = ALL_SOURCES;
VIC->vectoraddr = 0;
for (priority = 0;
priority <= 15; priority++)
{
VIC->vectcntl[priority] = 0;
VIC->vectaddr[priority] = 0;
}
VIC->softintclear = ALL_SOURCES;
VIC->intselect = 0;
VIC->defvectaddr = 0;
VIC->defvectaddr = (UNS_32)LH79524_default_unvectored_handler;
*((volatile UNS_32 *)ARM_IRQ_VEC) = LH79524_irq_vec;
*((volatile UNS_32 *)ARM_RESERVED_VEC) =
(UNS_32)&LH79524_irq_handler;
/* Return pointer to IRQ configuration structure */
status = (INT_32) &irqcfg;
}
return status;
}
/***********************************************************************
*
* Function: fiq_open
*
* Purpose: Open the FIQ controller
*
* Processing:
* If init is not FALSE, return 0x00000000 to the caller. Otherwise,
* set init to TRUE .
*
* Parameters:
* ipbase: void, pass 0
* arg : Not used
*
* Outputs: None
*
* Returns: The pointer to a FIQ structure or 0
*
* Notes: FIQ is disabled after open, use ioctl to enable FIQ
*
**********************************************************************/
INT_32 fiq_open(void *ipbase, INT_32 arg)
{
INT_32 status = 0;
if (fiqcfg.init == FALSE)
{
/* Device is valid and not previously initialized */
fiqcfg.init = TRUE;
/* Set up FIQ vector address */
*((volatile UNS_32 *)ARM_FIQ_VEC) = LH79524_fiq_vec;
*((volatile UNS_32 *)VEC_ADR_FIQ) =
(UNS_32)&LH79524_fiq_handler;
/* Return pointer to FIQ configuration structure */
status = (INT_32) &fiqcfg;
}
return status;
}
/***********************************************************************
*
* Function: swi_open
*
* Purpose: Open the SWI controller
*
* Processing:
* If init is not FALSE, return 0x00000000 to the caller. Otherwise,
* set init to TRUE .
*
* Parameters:
* ipbase: void, pass 0
* arg : Not used
*
* Outputs: None
*
* Returns: The pointer to a SWI structure or 0
*
* Notes: None
*
**********************************************************************/
INT_32 swi_open(void *ipbase, INT_32 arg)
{
INT_32 status = 0;
if (swicfg.init == FALSE)
{
/* Device is valid and not previously initialized */
swicfg.init = TRUE;
/* Install SWI vector handler address */
*((volatile UNS_32 *)ARM_SWI_VEC) = LH79524_swi_vec;
*((volatile UNS_32 *)VEC_ADR_SWI) =
(UNS_32)&LH79524_swi_handler;
/* Return pointer to SWI configuration structure */
status = (INT_32) &swicfg;
}
return status;
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