lh79524_i2c.h

SHARP_ARM720T_LH79524/5软件开发包_支持TFT_LCD_NAND_FLASH_ETH_USB

/***********************************************************************
 * $Workfile:   lh79524_i2c.h  $
 * $Revision:   1.3  $
 * $Author:   TilburyC  $
 * $Date:   Oct 13 2004 17:00:18  $
 *
 * Project: LH79524 I2C definitions
 *
 * Description:
 *     This file contains the structure definitions and manifest
 *     constants for LH79524 component: I2C
 *
 * Revision History:
 * $Log::   //smaicnt2/pvcs/VM/CHIPS/archives/software/csps/lh79524/inc$
 * 
 *    Rev 1.3   Oct 13 2004 17:00:18   TilburyC
 * Completed I2C device driver
 * 
 *    Rev 1.2   Oct 06 2004 17:35:06   TilburyC
 * Working i2c driver
 *
 *    Rev 1.1   Oct 01 2004 11:06:28   TilburyC
 * many changes to implement drivers
 *
 *    Rev 1.0   Sep 14 2004 14:49:52   TilburyC
 * Initial revision.
 *
 *
 ***********************************************************************
 *
 *  Copyright (c) 2004 Sharp Microelectronics of the Americas
 *
 *  All rights reserved
 *
 *  SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 *  OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 *  AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES,
 *  SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 *  SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY
 *  FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A
 *  SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 *  FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 **********************************************************************/

#ifndef LH79524_I2C_H
#define LH79524_I2C_H

#include "lh79524_chip.h"

/***********************************************************************
 * I2C Module Register Structure
 **********************************************************************/
typedef struct
{
    volatile UNS_32 iccon;  /* configuration register */
    volatile UNS_32 icsar;  /* slave address register */
    volatile UNS_32 icusar; /* upper slave address register */
    volatile UNS_32 icdata; /* receive data register */
    volatile UNS_32 ichcnt; /* clock high time program value */
    volatile UNS_32 iclcnt; /* clock low time program value */
    volatile UNS_32 reserved; /* not used */
    volatile UNS_32 icstat; /* module status register */
} I2C_REGS_T, *PI2C_REGS_T;

/***********************************************************************
 * Register offsets
 **********************************************************************/
#define I2C_ICCON       0x00
#define I2C_ICSAR       0x04
#define I2C_ICUSAR      0x08
#define I2C_ICDATA      0x0C
#define I2C_ICHCNT      0x10
#define I2C_ICLCNT      0x14
#define I2C_ICDEBUG     0x18
#define I2C_ICSTAT      0x1C

/*  Control register bits */
#define I2C_ICCON_MODE  _BITMASK(2) /* mode of the i2c interface */
#define I2C_ICCON_EN    _BIT(2) /* enable bit, set = enabled */
#define I2C_ICCON_SPEED _BIT(3) /* speed bit, set = fast */
#define I2C_ICCON_START _BIT(4) /* start bit, set = start */
#define I2C_ICCON_STOP  _BIT(5) /* stop bit, master only, 1 = stop*/
#define I2C_ICCON_RWC   _BIT(6) /* master control for read/write */
#define I2C_ICCON_SABT  _BIT(7) /* stop after bus transaction */
/* mode definitions */
#define I2C_MODE_7BIT_SLAVE     0x00
#define I2C_MODE_10BIT_SLAVE    0x01
#define I2C_MODE_7BIT_MASTER    0x02
#define I2C_MODE_10BIT_MASTER   0x03

/*  Lower slave address register */
#define I2C_ICSAR_SLAD  _BITMASK(8) /* slave address register */

/*  Upper slave address bits */
#define I2C_ICUSAR_SRW      _BIT(0) /* slave read/write control */
#define I2C_ICUSAR_SLAD     _SBF(1, _BITMASK(2)) /* bits 8:9 of addr */
#define I2C_ICUSAR_UADDR    _SBF(3, _BITMASK(5)) /* 10 bit upper addr */

/*  Data register mask */
#define I2C_ICDATA_REG  _BITMASK(8) /* data read/write FIFO register */

/*  Serial clock high time config register mask */
#define I2C_ICHCNT_REG  _BITMASK(8) /* control the high time of clock */

/*  Serial clock low time config register mask */
#define I2C_ICLCNT_REG  _BITMASK(8) /* low time of i2c bitclock */

/*  Transfer status register macros */
#define I2C_ICDEBUG_STARTDET _BIT(0)    /* start detected */
#define I2C_ICDEBUG_STOPDET  _BIT(1)    /* stop detected */
#define I2C_ICDEBUG_DATAPH  _BIT(2)     /* data on bus or not */
#define I2C_ICDEBUG_ADPH    _BIT(3)     /* address on bus or not */
#define I2C_ICDEBUG_RD      _BIT(4)     /* read in progress */
#define I2C_ICDEBUG_WR      _BIT(5)     /* write in progress */

/*  Module status register macros  */
#define I2C_ICSTAT_INTR     _BIT(0)     /* ctrler is interrupted */
#define I2C_ICSTAT_FULL     _BIT(1)     /* FIFO is full */
/* bit 2 is reserved */
#define I2C_ICSTAT_10BITADDR _BIT(3)    /* 10 bit address detected */
#define I2C_ICSTAT_IDLE     _BIT(4)     /* ctrler is idle */
#define I2C_ICSTAT_TXABORT  _BIT(5)     /* tx abort detected */
#define I2C_ICSTAT_RXABORT  _BIT(6)     /* rx abort detected */
#define I2C_ICSTAT_SLAVEAD  _BIT(7)     /* last byte was slave addr */

/* Macro pointing to I2C registers */
#define I2C    ((I2C_REGS_T *)(I2C_BASE))


#endif /* LH79524_I2C_H */