adc.c

SHARP_ARM720T_LH79524/5软件开发包_支持TFT_LCD_NAND_FLASH_ETH_USB

/**********************************************************************
 * Copyright (c) 2002 Sharp Microelectronics of the Americas
 *
 *        All rights reserved
 *      
 * $Workfile:   adc.c  $
 * $Revision:   1.1  $
 * $Author:   LiJ  $
 * $Date:   Oct 28 2005 14:22:46  $
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 * Project: LH79524 LPD SDK Example Code
 *
 * Description:
 *    This example shows how to use ADC driver in polled mode
 *
 * Notes:
 *  
 * Revision History:
 * $Log:   //smaicnt2/pvcs/VM/sharpmcu/archives/sharpmcu/software/csps/lh79524/bsps/sdk79524/examples/adc/adc.c-arc  $
 * 
 *    Rev 1.1   Oct 28 2005 14:22:46   LiJ
 * For web release
 * 
 *    Rev 1.0   Oct 20 2004 08:50:16   ZhangJ
 * Initial revision.
 * 
 *    Rev 1.0   Aug 19 2004 09:15:50   ZhangJ
 * Initial revision.
 * 
 * 
 *********************************************************************/
 
#include <string.h>
#include "abl_types.h"
#include "abl_irq_fiq.h"
#include "lh79524_chip.h"
#include "lh79524_adc.h"
#include "lh79524_adc_driver.h"

/* Board specific definition */
#define SDK79524_XTAL_IN    11289600 

/* Locals  */
static INT_32   dev_adc;            /* ADC device handle */
static UNS_16   adc_data[20];       /* Storage place for conversion data */
static ADC_CH_CONV_T adc_ch_cfg;    /* Channel configuration */


/************************************************************************
*
* Function: c_entry
*
* Purpose:  To demostrate the use of the ADC driver.  
*
* Processing:
*     
* Parameters: None  
*
* Outputs: None
*
* Returns: None
*
* Notes: 
*
************************************************************************/
INT_32 c_entry (void)
{       
    STATUS status;
    INT_32 idx = 0;
    INT_32 nbytes = 0;
        
    /* 
     * Open ADC.
     * It is set to a default state:
     * HCLK as ADC input clock, maximum clock divider 128,   
     * and continuous conversion mode.
     * Also, all the PJ related pins are configured to ANx.
     */
    dev_adc = adc_open((INT_32)ADC, SDK79524_XTAL_IN);
    
    /* Error to return */
    if (dev_adc == 0) return 1; 

    /* Need to set up the internal reference */
    adc_ioctl(dev_adc, ADC_ENABLE_IREF, (INT_32) 1);
       
    /*
     * Add AN0, AN1 and AN8 to the conversion sequence.
     * The initialization code assumes that the conv_count of
     * the ADC configuration structure defaults to zero, therefore it
     * will start from the high/low word control bank register 0.  
     */
    adc_ch_cfg.settle_time = 20;
    adc_ch_cfg.inpc = ADC_ANALOG_0;
    adc_ch_cfg.innc = ADC_REFN_GND;
    adc_ch_cfg.vrefp = ADC_REFP_VREF;
    adc_ch_cfg.vrefn = ADC_REFN_VREF;
    adc_ch_cfg.bias = 0;
    
    status = adc_ioctl(dev_adc, ADC_ADD_CHANNEL, (INT_32)&adc_ch_cfg);
    if (status == _ERROR) return 2;

    adc_ch_cfg.settle_time = 20;
    adc_ch_cfg.inpc = ADC_ANALOG_1;
    adc_ch_cfg.innc = ADC_REFN_GND;
    adc_ch_cfg.vrefp = ADC_REFP_VREF;
    adc_ch_cfg.vrefn = ADC_REFN_VREF;
    adc_ch_cfg.bias = 0;
    
    status = adc_ioctl(dev_adc, ADC_ADD_CHANNEL, (INT_32)&adc_ch_cfg);    
    if (status == _ERROR) return 3;

    adc_ch_cfg.settle_time = 20;
    adc_ch_cfg.inpc = ADC_ANALOG_8;
    adc_ch_cfg.innc = ADC_REFN_GND;
    adc_ch_cfg.vrefp = ADC_REFP_VREF;
    adc_ch_cfg.vrefn = ADC_REFN_VREF;
    adc_ch_cfg.bias = 0;
    
    status = adc_ioctl(dev_adc, ADC_ADD_CHANNEL, (INT_32)&adc_ch_cfg);    
    if (status == _ERROR) return 4;

    /* Set the ADC conversion mode to software triggered */ 
    status = adc_ioctl(dev_adc, ADC_SET_STATE, ADC_SW_TRIGGERED);    
    if (status == _ERROR) return 5;
    
 
    
    /* Loop around. Check the result by using a debugger */   
    while (1)
    {

        /* Clear status */
        adc_ioctl(dev_adc, ADC_CLEAR_INTS, ADC_PEN_CLR | ADC_EOS_CLR);   
        
        /* Clear the FIFO of any garbage */
        adc_ioctl(dev_adc, ADC_CLEAR_FIFO, 0);
       
       /* Trigger to start next conversion */
        status = adc_ioctl(dev_adc, ADC_START_SAMP, 0); 
        if (status == _ERROR) return 6;               
    
        /* Wait for conversion to complete. */
        while((adc_ioctl(dev_adc, ADC_GET_STATUS, (INT_32)ADC_RAWINT_ST) 
               & ADC_EOS_IRQ) == 0);
    
        /* Polling the ADC data. 6 bytes or till the FIFO is empty */
        nbytes = adc_read_polled(dev_adc, adc_data, 6);
        
        /* Just want to have a place to set a break point */
        if (nbytes == 20) nbytes = 0;        
    }
}


#ifdef __iar

void main(void)
{
	c_entry();
	while(1);
}

#endif