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ddr and sdram memory check,ddr and sdram memory check

number of consecutive addresses to be reported as bad and generally there
will be many bits in error.  If you have a relatively small number of
failing addresses and only one or two bits in error you can be certain
that the errors are valid.  Also intermittent errors are always valid.

All valid memory errors should be corrected.  It is possible that a
particular error will never show up in normal operation. However, operating
with marginal memory is risky and can result in data loss and even
disk corruption.  You can be sure that Murphy will get you if you know
about a memory error and ignore it.

Memtest86 can not diagnose many types of PC failures.  For example a
faulty CPU that causes Windows to crash will most likely just cause
Memtest86 to crash in the same way.


9) Execution Time
==================
The time required for a complete pass of Memtest86 will vary greatly
depending on CPU speed, memory speed and memory size.  Here are the
execution times from a Cleron-366 with 64MB of SDRAM:

  Test 0:     0:05
  Test 1:     0:18
  Test 2:     1:02
  Test 3:     1:38
  Test 4:     8:05
  Test 5:     1:40
  Test 6:     4:24
  Test 7:     6:04

  Total Time for Default tests:  23:16

  Test 8:     12:30
  Test 9:     49:30
  Test 10:    30:34
  Test 11:  3:29:40

  Total Time for All tests:  5:25:30


10) Memory Testing Philosophy
============================
There are many good approaches for testing memory.  However, many tests
simply throw some patterns at memory without much thought or knowledge
of the memory architecture or how errors can best be detected. This
works fine for hard memory failures but does little to find intermittent
errors.  The BIOS based memory tests are useless for finding intermittent
memory errors.

Memory chips consist of a large array of tightly packed memory cells,
one for each bit of data.  The vast majority of the intermittent failures
are a result of interaction between these memory cells.  Often writing a
memory cell can cause one of the adjacent cells to be written with the
same data.  An effective memory test should attempt to test for this
condition.  Therefore, an ideal strategy for testing memory would be
the following:

  1) write a cell with a zero
  2) write all of the adjacent cells with a one, one or more times
  3) check that the first cell still has a zero

It should be obvious that this strategy requires an exact knowledge
of how the memory cells are laid out on the chip.  In addition there is a
never ending number of possible chip layouts for different chip types
and manufacturers making this strategy impractical.  However, there
are testing algorithms that can approximate this ideal strategy. 


11) Memtest86 Test Algorithms
============================
Memtest86 uses two algorithms that provide a reasonable approximation
of the ideal test strategy above.  The first of these strategies is called
moving inversions.  The moving inversion test works as follows:

  1) Fill memory with a pattern
  2) Starting at the lowest address
	2a check that the pattern has not changed
	2b write the patterns complement
	2c increment the address
	repeat 2a - 2c
  3) Starting at the highest address
	3a check that the pattern has not changed
	3b write the patterns complement
	3c decrement the address
	repeat 3a - 3c

This this algorithm is a good approximation of an ideal memory test but
there are some limitations.  Most high density chips today store data
4 to 16 bits wide.  With chips that are more than one bit wide it
is impossible to selectively read or write just one bit.  This means
that we cannot guarantee that all adjacent cells have been tested
for interaction.  In this case the best we can do is to use some
patterns to insure that all adjacent cells have at least been written
with all possible one and zero combinations.

It can also be seen that caching, buffering and out of order execution
will interfere with the moving inversions algorithm and make less effective.
It is possible to turn off cache but the memory buffering in new high
performance chips can not be disabled.  To address this limitation a new
algorithm I call Modulo-X was created.  This algorithm is not affected by
cache or buffering.  The algorithm works as follows:
  1) For starting offsets of 0 - 20 do
	1a write every 20th location with a pattern
	1b write all other locations with the patterns complement
	   repeat 1b one or more times
	1c check every 20th location for the pattern

This algorithm accomplishes nearly the same level of adjacency testing
as moving inversions but is not affected by caching or buffering.  Since
separate write passes (1a, 1b) and the read pass (1c) are done for all of
memory we can be assured that all of the buffers and cache have been
flushed between passes.  The selection of 20 as the stride size was somewhat
arbitrary.  Larger strides may be more effective but would take longer to
execute.  The choice of 20 seemed to be a reasonable compromise between
speed and thoroughness.


12) Individual Test Descriptions
===============================
Memtest86 executes a series of numbered test sections to check for
errors.  These test sections consist of a combination of test
algorithm, data pattern and caching. The execution order for these tests
were arranged so that errors will be detected as rapidly as possible.
Tests 8, 9, 10 and 11 are very long running extended tests and are only
executed when extended testing is selected.  The extended tests have a
low probability of finding errors that were missed by the default tests.
A description of each of the test sections follows:

Test 0 [Address test, walking ones, no cache]
  Tests all address bits in all memory banks by using a walking ones
  address pattern.  Errors from this test are not used to calculate
  BadRAM patterns.

Test 1 [Moving Inv, ones&zeros, cached]
  This test uses the moving inversions algorithm with patterns of only
  ones and zeros.  Cache is enabled even though it interferes to some
  degree with the test algorithm.  With cache enabled this test does not
  take long and should quickly find all "hard" errors and some more
  subtle errors.  This section is only a quick check.

Test 2 [Address test, own address, no cache]
  Each address is written with its own address and then is checked
  for consistency.  In theory previous tests should have caught any
  memory addressing problems.  This test should catch any addressing
  errors that somehow were not previously detected.
 
Test 3 [Moving inv, 8 bit pat, cached]
  This is the same as test zero but uses a 8 bit wide pattern of
  "walking" ones and zeros.  This test will better detect subtle errors
  in "wide" memory chips.  A total of 20 data patterns are used.
  
Test 4 [Moving inv, 32 bit pat, cached]
  This is a variation of the moving inversions algorithm that
  shifts the data pattern left one bit for each successive address.
  The starting bit position is shifted left for each pass.  To use
  all possible data patterns 32 passes are required.  This test is
  very effective at detecting data sensitive errors in "wide" memory
  chips.

Test 5 [Block move, 64 moves, cached]
  This test stresses memory by using block move (movsl) instructions
  and is based on Robert Redelmeier's burnBX test.  Memory is initialized
  with shifting patterns that are inverted every 8 bytes.  Then 4MB blocks
  of memory are moved around using the movsl instruction.  After the moves
  are completed the data patterns are checked.  Because the data is checked
  only after the memory moves are completed it is not possible to know
  where the error occurred.  The addresses reported are only for where the
  bad pattern was found.  Since the moves are constrained to a 8MB segment
  of memory the failing address will always be lest than 8MB away from the
  reported address.  Errors from this test are not used to calculate
  BadRAM patterns.

Test 6 [Modulo 20, ones&zeros, cached]
  Using the Modulo-X algorithm should uncover errors that are not
  detected by moving inversions due to cache and buffering interference
  with the the algorithm.  As with test one only ones and zeros are
  used for data patterns.

Test 7 [Moving inv, ones&zeros, no cache]
  This is the same as test one but without cache.  With cache off
  there will be much less interference with the test algorithm.
  However, the execution time is much, much longer.  This test may
  find very subtle errors missed by tests one and two.

Test 8 [Block move, 512 moves, cached]
  This is the same as test #5 except that we do a lot more memory moves
  before checking memory. Errors from this test are not used to calculate
  BadRAM patterns.

Test 9 [Moving inv, 8 bit pat, no cache]
  This is the first extended test.  By using an 8 bit pattern with
  cache off this test should be effective in detecting all types of
  errors.  However, it takes a very long time to execute and there is
  a low probability that it will detect errors not found by the previous
  tests.

Test 10 [Modulo 20, 8 bit, cached]
  This is the first test to use the modulo 20 algorithm with a data
  pattern other than ones and zeros.  This combination of algorithm and
  data pattern should be quite effective.  However, it's very long
  execution time relegates it to the extended test section.

Test 11 [Moving inv, 32 bit pat, no cache]
  This test should be the most effective in finding errors that are
  data pattern sensitive.  However, without cache it's execution time
  is excessively long.


13) Problem Reporting - Contact Information
===========================================
Due to the growing popularity of Memtest86 I am being inundated by,
questions, feedback, problem reports and requests for enhancements.
Memtest86 is a side project and often my day job interferes with Memtest86
support.  To help me keep up with this project, please use the following
guidelines.

Problems/Bugs:
Before submitting a problem report please check the Known Problems section
to see if this problem has already been reported.  Be sure to include the
version number and also any details that may be relevant.

Memtest86 sometimes just dies with no hints as to what went wrong.
Without any details it is nearly impossible to fix these failures.  Fixing
these problems will require debugging assistance on your part.  There is
no point in reporting these failures unless you have a Linux system and
would be willing to assist me in finding the failure.

Enhancements:
If you would like to request an enhancement please see if is already on
the Planned Features List before sending your request.  All requests will
be considered, but not all can be implemented.  If you are be interested in
contributing code please contact me so that the integration can be
co-ordinated.

Feedback:
I have received a lot of feedback about the effectiveness of various
tests.  I am still interested in hearing about failures that only a single
test was able to detect.  Of course, gratitude, praise and cash are always
accepted.

Chris Brady, Email: [e-mail]


14) Known Problems
==================
Sometimes when booting from a floppy disk the following messages scroll up
on the screen:
        X:8000
        AX:0212
        BX:8600
        CX:0201
        DX:0000
This the BIOS reporting floppy disk read errors.  Either re-write or toss
the floppy disk.

Memtest86 has no support for multiple CPUs.  Memtest86 should run
without problems, but it will only use one CPU.

Memtest86 can not diagnose many types of PC failures.  For example a
faulty CPU that causes Windows to crash will most likely just cause
Memtest86 to crash in the same way.

There have been numerous reports of errors in only tests 5 and 8 on Athlon
systems.  Often the memory works in a different system or the vendor insists
that it is good.  In these cases the memory is not necessarily bad but is
not able to operate reliably at Athlon speeds.  Sometimes more conservative
memory timings on the motherboard will correct these errors.  In other
cases the only option is to replace the memory with better quality, higher
speed memory.  Don't buy cheap memory and expect it to work with an Athlon!

Memtest86 supports all types of memory.  If fact the test has absolutely