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Date: Tue, 14 Jan 1997 22:48:34 GMTServer: NCSA/1.4.1Content-type: text/htmlLast-modified: Tue, 26 Nov 1996 17:22:16 GMTContent-length: 6768<HTML><HEAD> <META NAME="GENERATOR" CONTENT="Adobe PageMill 2.0 Mac"> <TITLE>V22.0036 - Computer Architecture - Fall 1996</TITLE></HEAD><BODY><P>V22.0436 - Computer Architecture - Fall 1996 Prof. Grishman<BR></P><P ALIGN=CENTER><B>Course Schedule</B></P><P ALIGN=CENTER>Last revised October 9, 1996<BR></P><P ALIGN=CENTER><TABLE BORDERCOLOR="#000000" BORDER="0" CELLSPACING="2"CELLPADDING="0"><TR><TD WIDTH="44"><B>Class</B></TD><TD WIDTH="59"><B>Date</B></TD><TD WIDTH="156"><B>Topic</B></TD><TD WIDTH="91"><B>Text</B></TD><TD WIDTH="91"><B>Assignment</B> </TD></TR><TR><TD WIDTH="44"><B>1</B></TD><TD WIDTH="59">Sept. 5</TD><TD WIDTH="156"><B><!WA0><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture1.html">Historical Perspective</A></B> </TD><TD WIDTH="91"><B>Chap. 1</B></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"></TD><TD WIDTH="59"></TD><TD WIDTH="156"><B>Logic Design</B> </TD><TD WIDTH="91"><B>Appendix B</B></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>2</B></TD><TD WIDTH="59">Sept. 10</TD><TD WIDTH="156"><!WA1><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture2.html">Gates, TTs, & logic eqns</A> </TD><TD WIDTH="91">B.2</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>3</B></TD><TD WIDTH="59">Sept. 12</TD><TD WIDTH="156"><!WA2><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture3.html">Canonical forms; fan-in&out</A> </TD><TD WIDTH="91">B.3</TD><TD WIDTH="91">uh (universltíy) </TD></TR><TR><TD WIDTH="44"><B>4</B></TD><TD WIDTH="59">Sept. 17</TD><TD WIDTH="156"><!WA3><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture4.html">Comb. logic; FFs</A></TD><TD WIDTH="91">B.4</TD><TD WIDTH="91"><!WA4><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/assignment1.html">#1 (comb. ckt.)</A></TD></TR><TR><TD WIDTH="44"><B>5</B></TD><TD WIDTH="59">Sept. 19</TD><TD WIDTH="156"><!WA5><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture5.html">Sequential circuits;</A></TD><TD WIDTH="91">B.5</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>6</B></TD><TD WIDTH="59">Sept. 24</TD><TD WIDTH="156"><!WA6><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture6.html">Finite state machines</A></TD><TD WIDTH="91">B.6</TD><TD WIDTH="91"><!WA7><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/assignment2.html">#2 (FSM)</A></TD></TR><TR><TD WIDTH="44"><B>7</B></TD><TD WIDTH="59">Sept. 26</TD><TD WIDTH="156">Register files and RAMs</TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"></TD><TD WIDTH="59"></TD><TD WIDTH="156"><B>MIPS and Arithmetic</B> </TD><TD WIDTH="91"><B>Chap. 3 and 4</B></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>8</B></TD><TD WIDTH="59">Oct. 1</TD><TD WIDTH="156"><!WA8><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture8.html">MIPS Architecture; addn/subtn</A></TD><TD WIDTH="91">3; 4.2 & 4.3</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>9</B></TD><TD WIDTH="59">Oct. 3</TD><TD WIDTH="156"><!WA9><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture9.html">ALU; CLA</A></TD><TD WIDTH="91">4.4 & 4.5</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>10</B></TD><TD WIDTH="59">Oct. 8</TD><TD WIDTH="156"><!WA10><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture10.html">CLA; shifters</A></TD><TD WIDTH="91"></TD><TD WIDTH="91"><!WA11><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/ungraded2.html">uh (MIPS)</A>;<BR><!WA12><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/assignment3.html">#3 (ALU)</A></TD></TR><TR><TD WIDTH="44"><B>11</B></TD><TD WIDTH="59">Oct. 10</TD><TD WIDTH="156"><!WA13><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture11.html">Multiplier </A></TD><TD WIDTH="91">4.6</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"></TD><TD WIDTH="59"></TD><TD WIDTH="156"><B>Processor: Data Path</B> </TD><TD WIDTH="91"><B>Chap. 5</B></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>12</B></TD><TD WIDTH="59">Oct. 15</TD><TD WIDTH="156"><!WA14><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture12.html">Building a data path </A></TD><TD WIDTH="91">5.1</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>13</B></TD><TD WIDTH="59">Oct. 17</TD><TD WIDTH="156"><I>Review for Mid-term</I> </TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>14</B></TD><TD WIDTH="59">Oct. 22</TD><TD WIDTH="156"><I>Mid-term</I> </TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>15</B></TD><TD WIDTH="59">Oct. 24</TD><TD WIDTH="156">A simple implementation </TD><TD WIDTH="91">5.2</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>16</B></TD><TD WIDTH="59">Oct. 29</TD><TD WIDTH="156"><!WA15><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture16.html">Processor implement., cont'd </A></TD><TD WIDTH="91"></TD><TD WIDTH="91"><!WA16><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/assignment4.html">#4 (data paths)</A></TD></TR><TR><TD WIDTH="44"></TD><TD WIDTH="59"></TD><TD WIDTH="156"><B>Performance Issues</B> </TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>17</B></TD><TD WIDTH="59">Oct. 31</TD><TD WIDTH="156"><!WA17><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture17.html">measuring performance </A></TD><TD WIDTH="91">Chap. 2</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>18</B></TD><TD WIDTH="59">Nov. 5</TD><TD WIDTH="156"><!WA18><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture18.html">improving perf.: pipelining</A></TD><TD WIDTH="91">Chap. 6.1-6.2</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"></TD><TD WIDTH="59"></TD><TD WIDTH="156"><B>Memory</B> </TD><TD WIDTH="91"><B>Chap. 7</B></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>19</B></TD><TD WIDTH="59">Nov. 7</TD><TD WIDTH="156"><!WA19><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture19.html">memory technology</A></TD><TD WIDTH="91">7.2</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>20</B></TD><TD WIDTH="59">Nov. 12</TD><TD WIDTH="156"><!WA20><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture20.html">cache </A></TD><TD WIDTH="91"></TD><TD WIDTH="91">#5 (perf.) </TD></TR><TR><TD WIDTH="44"><B>21</B></TD><TD WIDTH="59">Nov. 14</TD><TD WIDTH="156">cache, cont'd </TD><TD WIDTH="91">7.3</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>22</B></TD><TD WIDTH="59">Nov. 19</TD><TD WIDTH="156"><!WA21><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture22.html">virtual memory</A></TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"></TD><TD WIDTH="59"></TD><TD WIDTH="156"><B>Input-output</B> </TD><TD WIDTH="91"><B>Chap. 8</B></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>23</B></TD><TD WIDTH="59">Nov. 21</TD><TD WIDTH="156"><!WA22><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture23.html">types of devices; busses</A></TD><TD WIDTH="91">8.2</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>24</B></TD><TD WIDTH="59">Nov. 26</TD><TD WIDTH="156"><!WA23><A HREF="http://cs.nyu.edu/cs/dept_info/course_home_pages/fall96/V22.0436/lecture24.html">busses and interrupts</A></TD><TD WIDTH="91">8.3</TD><TD WIDTH="91">#6 (memory)</TD></TR><TR><TD WIDTH="44"><B>25</B></TD><TD WIDTH="59">Dec. 3</TD><TD WIDTH="156">interfacing devices </TD><TD WIDTH="91">8.4</TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>25</B></TD><TD WIDTH="59">Dec. 5</TD><TD WIDTH="156"><I>spare</I> </TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR><TR><TD WIDTH="44"><B>26</B></TD><TD WIDTH="59">Dec. 10</TD><TD WIDTH="156"><I>Review for final exam</I> </TD><TD WIDTH="91"></TD><TD WIDTH="91"></TD></TR></TABLE></BODY></HTML>⌨️ 快捷键说明
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