http:^^www.cs.jhu.edu^~cypher^pubs^pubs.html

This data set contains WWW-pages collected from computer science departments of various universities

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<li><cite> Repeatable and Portable Message-Passing Programs</cite>. 
R. Cypher, E. Leu, Proceedings 1994 ACM Symposium on Principles of Distributed 
Computing, pp. 22-31.

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<li><cite> CCL: A Portable and Tunable Collective Communication Library for 
Scalable Parallel Computers</cite>. 
J. Bruck, R. Cypher, P. Elustando, A. Ho, C.T. Ho, V. Bala, S. Kipnis, M. Snir, 
Proceedings 1994 International Parallel Processing Symposium, pp. 835-844.

<p>

<li><cite> The Semantics of Blocking and Nonblocking Send and Receive 
Primitives</cite>.
R. Cypher, E. Leu, Proceedings 1994 International Parallel Processing Symposium,
pp. 729-735.

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<li><cite> Bounds on the Efficiency of Message-Passing Protocols for Parallel
Computers</cite>. 
R. Cypher, S. Konstantinidou, Proceedings 1993 ACM Symposium on Parallel 
Algorithms and Architectures, pp. 173-181.

<p>

<li><cite> Fault-Tolerant Meshes with Small Degree</cite>. 
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1993 ACM Symposium on Parallel 
Algorithms and Architectures, pp. 1-10.

<p>

<li><cite> Architectural Requirements of Parallel Scientific Applications with
Explicit Communication</cite>. 
R. Cypher, S. Konstantinidou, A. Ho, P. Messina, Proceedings 1993 International 
Symposium on Computer Architecture, pp. 2-13.

<p>

<li><cite> Wildcard Dimensions, Coding Theory and Fault-Tolerant Meshes and 
Hypercubes</cite>. 
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1993 International Symposium on 
Fault-Tolerant Computing, pp. 260-267.

<p>

<li><cite> Tolerating Faults in a Mesh with a Row of Spare Nodes</cite>. 
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1992 IEEE Symposium on Parallel and 
Distributed Processing, pp. 12-19.

<p>

<li><cite> Fault-Tolerant Embeddings of Rings, Meshes and Tori in 
Hypercubes</cite>.
A. Wang, R. Cypher, Proceedings 1992 IEEE Symposium on Parallel and Distributed
Processing, pp. 20-29.

<p>

<li><cite> Multiple Message Broadcasting with Generalized Fibonacci 
Trees</cite>. 
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1992 IEEE Symposium on Parallel and 
Distributed Processing, pp. 424-431.

<p>

<li><cite> Hierarchical Shuffle-Exchange and de Bruijn Networks</cite>. 
R. Cypher, J. Sanz, Proceedings 1992 IEEE Symposium on Parallel and Distributed
Processing, pp. 491-496.

<p>

<li><cite> Fault Tolerant Graphs, Perfect Hash Functions and Disjoint 
Paths</cite>.
M. Ajtai, N. Alon, J. Bruck, R. Cypher, C.T. Ho, M. Naor, E. Szemeredi,
Proceedings 33rd IEEE Symposium on Foundations of Computer Science, 
1992, pp. 693-702.

<p>

<li><cite> Adaptive, Deadlock-Free Packet Routing in Torus Networks with Minimal
Storage</cite>. 
R. Cypher, L. Gravano, Proceedings 1992 International Conference on Parallel 
Processing, vol. III, pp. 204-211.

<p>

<li><cite> Fault-Tolerant de Bruijn and Shuffle-Exchange Networks</cite>. 
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1992 International Conference on 
Parallel Processing, vol. III, pp. 46-50.

<p>

<li><cite> Requirements for Deadlock-Free, Adaptive Packet Routing</cite>. 
R. Cypher, L. Gravano, Proceedings 1992 ACM Symposium on Principles of 
Distributed Computing, pp. 25-33.

<p>

<li><cite> Efficient Fault-Tolerant Mesh and Hypercube Architectures</cite>. 
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1992 International Symposium on 
Fault-Tolerant Computing, pp. 162-169.

<p>

<li><cite> Embedding Complete Binary Trees in Faulty Hypercubes</cite>.
A. Wang, R. Cypher, E. Mayr, Proceedings 1991 IEEE Symposium on Parallel and
Distributed Processing, pp. 112-119.

<p>

<li><cite> Fault-Tolerant Meshes with Minimal Numbers of Spares</cite>.
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1991 IEEE Symposium on Parallel and
Distributed Processing, pp. 288-295.

<p>

<li><cite> A Comparison of SIMD Hypercube Routing Strategies</cite>. 
M. Fulgham, R. Cypher, J. Sanz, Proceedings 1991 International Conference on 
Parallel Processing, vol. III, pp. 236-243.

<p>

<li><cite> On the Construction of Fault-Tolerant Cube-Connected Cycles 
Networks</cite>.
J. Bruck, R. Cypher, C.T. Ho, Proceedings 1991 International Conference on 
Parallel Processing, vol. I, pp. 692-693.

<p>

<li><cite> Generalized Trace-Back Techniques for Survivor Memory Management in 
the Viterbi Algorithm</cite>. 
R. Cypher, B. Shung, Proceedings 1990 IEEE Global Telecommunications Conference,
pp. 1318-1322.

<p>

<li><cite> Theoretical Aspects of VLSI Pin Limitations</cite>.
R. Cypher, Proceedings 6th MIT Conference on Advanced Research in VLSI, 
pp. 314-327 (1990).

<p>

<li><cite> Deterministic Sorting in Nearly Logarithmic Time on the Hypercube and
Related Computers</cite>. 
R. Cypher, G. Plaxton, Proceedings 22nd ACM Symposium on Theory of Computing, 
pp. 193-203 (1990).

<p>

<li><cite> Running Algorithms Efficiently on Faulty Hypercubes</cite>. 
J. Bruck, R. Cypher, D. Soroker, Proceedings 1990 ACM Symposium on Parallel 
Algorithms and Architectures, pp. 37-44.

<p>

<li><cite> A Lower Bound on the Size of Shellsort Sorting Networks</cite>.
R. Cypher, Proceedings 1989 ACM Symposium on Parallel Algorithms and 
Architectures, pp. 58-63.

<p>

<li><cite> Algorithms for Massively Parallel Image Processing 
Architectures</cite>. 
R. Cypher, J. Sanz, Proceedings 9th International Conference on Pattern 
Recognition, pp. 412-419 (1988).

<p>

<li><cite> Cubesort: An Optimal Sorting Algorithm for 
Feasible Parallel Computers</cite>. 
R. Cypher, J. Sanz, Proceedings 1988 Aegean Workshop on Computing, pp. 456-464.

<p>

<li><cite> Optimal Sorting on Reduced Architectures</cite>. 
R. Cypher, J. Sanz, Proceedings 1988 International Conference on Parallel 
Processing, vol. III, pp. 308-311.

<p>

<li><cite> Practical Algorithms for Image Component Labeling on SIMD Mesh 
Connected Computers</cite>. 
R. Cypher, J. Sanz, L. Snyder, Proceedings 1987 International Conference on 
Parallel Processing, pp. 772-779.

<p>

<li><cite> The Hough Transform Has O(N) Complexity on SIMD N x N Mesh Array 
Architectures</cite>. 
R. Cypher, J. Sanz, L. Snyder, Proceedings 1987 Workshop on Computer 
Architecture for Pattern Analysis and Machine Intelligence, pp. 115-121.

<p>

<li><cite> Hypercube and Shuffle-Exchange Algorithms for Image Component 
Labeling</cite>. 
R. Cypher, J. Sanz, L. Snyder, Proceedings 1987 Workshop on Computer 
Architecture for Pattern Analysis and Machine Intelligence, pp. 5-10.

<p>

<li><cite> EREW PRAM and Mesh Connected Computer Algorithms for Image Component 
Labeling</cite>. 
R. Cypher, J. Sanz, L. Snyder, Proceedings 1987 Workshop on Computer 
Architecture for Pattern Analysis and Machine Intelligence, pp. 122-130.

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<h3>Book:</h3>

<p>

<ul>

<li><cite> The SIMD Model of Parallel Computation</cite>. 
R. Cypher, J. Sanz, Springer-Verlag, New York, NY, 1994.

</ul>

<p>

<HR>

<h3>Other Publications:</h3>

<p>

<ul>

<li><cite> Survey of Routing Issues for the Vulcan Parallel Computer</cite>.
J. Bruck, R. Cypher, L. Gravano, A. Ho, C.T. Ho, S. Konstantinidou, E. Upfal,
IBM Almaden, Technical Report, June 1992.

<p>

<li><cite> A Proposal for the Topology and Wiring of the Green Vulcan</cite>.
J. Bruck, Cypher, C.T. Ho, E. Upfal, IBM Almaden, Technical Report, 
February 1991.

<p>

<li><cite> Techniques for Shared Key Sorting</cite>. 
R. Cypher, G. Plaxton, IBM Almaden, Technical Report, March 1990.

<p>

<li><cite> Efficient Communication in Massively Parallel Computers</cite>.
R. Cypher, Ph.D. Dissertation, Dept. of Computer Science, U. of Washington, 
June 1989.

<p>

<li><cite> Valiant's Maximum Algorithm with Sequential Memory Accesses</cite>.
R. Cypher, Dept. of Computer Science, U. of Washington, Technical Report,
April 1988.

</ul>

<p>

<HR>

<h3>Patents:</h3>

<p>

<ul>

<li><cite> Methods and Apparatus for Tolerating Faults in Mesh 
Architectures</cite>.
J. Bruck, R. Cypher, C.T. Ho, US Patent No. 5,280,607, Jan. 1994.

<p>

<li><cite> Method and Apparatus for a Fault-Tolerant Mesh with Spare 
Nodes</cite>.
J. Bruck, R. Cypher, C.T. Ho, US Patent No. 5,271,014, Dec. 1993.

<p>

<li><cite> A Method of Packet Routing in Torus Networks with Two Buffers per 
Edge</cite>.
R. Cypher, L. Gravano, US Patent No. 5,444,701, Aug. 1995.

<p>

<li><cite> A Method for Generating Hierarchical Fault-Tolerant Mesh 
Architectures</cite>.
J. Bruck, R. Cypher, C.T. Ho, US Patent No. 5,513,313, Apr. 1996.

<p>

<li><cite> New Hierarchical Interconnection Networks for Parallel 
Processing</cite>.
R. Cypher, J. Sanz, US Patent No. 5,513,371, Apr. 1996.

</ul>

<p>

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Last updated September 25, 1996.