📄 http:^^www.cae.wisc.edu^~ece552^hw2^sol2^sol2b.html

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Server: Netscape-Enterprise/2.0a
Date: Wed, 13 Nov 1996 23:14:44 GMT
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<HEAD><TITLE>Homework #2 Solutions</TITLE></HEAD><BODY><h3>Homework #2 Solutions</h3><p>Click <a href="sol2.ps">here</a> to see the answers to the writtenquestions.<P><b> Problem 6</b> A <a href="16bitcla.ps">schematic</a> of a 16-bit carrylookahead adder.  There are several schematics which are part of thisdesign, and they are listed here. <p><a href="4bitcla.ps">4-bit CLA</a> <p><a href="pg.ps">pg unit</a> <p><a href="summer.ps">summer unit</a> <p><a href="clalogic.ps">CLA logic unit</a> <p>The <a href="addersim.ps">simulation waveform</a> of the adder, showingthe delay in getting c16 to go high.<P><br><hr><b> Problem 7</b>A <a href="pc.ps">schematic</a> of a Program Counter unit, plus itscomponent part schematics:<p><a href="register16.ps">16 bit register</a> <p><a href="4x1mux16.ps">4 to 1 16-bit multiplexer</a> <p><P><BR> <HR><P><ADDRESS><I>Course Account ece552 <BR>Sun Sep 22 14:56:18 CDT 1996</I></ADDRESS></BODY>

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