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Date: Tue, 05 Nov 1996 00:28:09 GMTServer: NCSA/1.5Content-type: text/htmlLast-modified: Thu, 24 Oct 1996 16:02:16 GMTContent-length: 3805<HTML><Title> CS 701 Reading Assignments and Research Papers </Title><h2>Reading Assignments</h2><ol><li>Sept 3 (Lecture 1)<ul><li>Get class handouts 1 and 2 from DOIT.<li>Read Section 15.6 of Chapter 15 (from handout 1)<li>Read Davison & Fraser paper ("Retargetable Peephole Optimization")<li>Read <!WA0><A HREF="http://www.cs.wisc.edu/~fischer/cs701/proj1.html"> Project 1 </a> assignment.</ul><li>Sept 17 (Lecture 5)<ul><li>Get class handout 3 from DOIT.<li>Read Davison & Fraser paper ("Code Selection through Object Code Optimization")</ul><li>Sept 19 (Lecture 6)<ul><li>Read Section 15.1 of Chapter 15 (from handout 1)</ul><li>Sept 24 (Lecture 7)<ul><li>Read Section 15.2 of Chapter 15 (from handout 1)<LI> <!WA1><A HREF="http://www.cs.wisc.edu/~fischer/cs701/inst.sched.ps"> Efficient Instruction Scheduling for Delayed-Load Architectures </A></ul><li>Sept 26 (Lecture 8)<ul><li>Read Section 15.4 of Chapter 15 (from handout 1)<li>Read Chaitin's paper ("Register Allocation via Coloring")<li>Read <!WA2><A HREF="http://www.cs.wisc.edu/~fischer/cs701/proj2.html"> Project 2 </a> assignment.</ul><li>October 3 (Lecture 10)<ul><li>Read Hennessy & Chow's paper ("Priority-Based Coloring")<LI> <!WA3><A HREF="http://www.cs.wisc.edu/~fischer/cs701/appel-george.ps"> Iterated Register Coalescing </A></ul><li>October 8 (Lecture 11)<ul><LI> <!WA4><A HREF="http://www.cs.wisc.edu/~fischer/cs701/CaKo_register.ps"> Register Allocation via Hierarchical Graph Coloring</A></ul><li>October 10 (Lecture 12)<ul><li>Read Wall's paper ("Global Register Allocation at Link-time")<LI> <!WA5><A HREF="http://www.cs.wisc.edu/~fischer/cs701/kurlander.ps"> Minimum Cost Interprocedural Register Allocation </A></ul><li>October 15 (Lecture 13)<ul><li>Read Gibbon's & Muchnick's paper("Efficient Instruction Scheduling for a Pipelined Architectire")</ul><li>October 17 (Lecture 14)<ul><li>Read Goodman & Hsu's paper("Code Scheduling and Register Allocation")<li>Get Bernstein & Rodeh's paper("Global Instruction Scheduling") from DOIT.</ul><li>October 24 (Lecture 16)<ul><li>Read Section 15.5 of Chapter 15 (from handout 1)<LI> <!WA6><A HREF="http://www.cs.wisc.edu/~fischer/cs701/burg.ps"> BURG -- Fast Optimal Instruction Selection and Tree Parsing </A><LI> <!WA7><A HREF="http://www.cs.wisc.edu/~fischer/cs701/iburg.ps"> Engineering a Simple, Efficient Code Generator </A><li>Get Handout #5("Automatic Program Optimization") from DOIT.</ul></ol><H2> Suuplementary Information and Research Papers </H2><BODY> <UL> <LI> <!WA8><A HREF="http://www.sun.com:80/sparc/products/microproc.html"> Sparc Architectures </A> <LI> <!WA9><A HREF="http://www.cs.wisc.edu/~fischer/cs701/sparc.summary.html"> Summary of Sparc Architectures </A> <LI> <!WA10><A HREF="http://www.cs.wisc.edu/~fischer/cs701/prob.reg.ps"> Demand Driven register Allocation </A><!----------------- <LI> <!WA11><A HREF="http://www.cs.wisc.edu/~fischer/cs701/wcsss96_eel.ps"> Instruction Scheduling and Executable Editing </A> <LI> <!WA12><A HREF="http://www.cs.wisc.edu/~fischer/cs701/PLDI-95-ESP.ps"> Corpus-based Static Branch Prediction</A> <LI> <!WA13><A HREF="http://www.cs.wisc.edu/~fischer/cs701/burg.ps"> BURG -- Fast Optimal Instruction Selection and Tree Parsing </A> <LI> <!WA14><A HREF="http://www.cs.wisc.edu/~fischer/cs701/iburg.ps"> Engineering a Simple, Efficient Code Generator </A> <LI> <!WA15><A HREF="http://www.cs.wisc.edu/~fischer/cs701/opt.ps"> Automatic Program Optimization </A> <LI> <!WA16><A HREF="http://www.cs.wisc.edu/~fischer/cs701/rama.ps"> Data Flow Frequence Analysis </A> <LI> <!WA17><A HREF="http://www.cs.wisc.edu/~fischer/cs701/pldi92.ps"> Lazy Code Motion </A> <LI> <!WA18><A HREF="http://www.cs.wisc.edu/~fischer/cs701/pldi94.ps"> Partial Dead Code Elimination </A> <LI> <!WA19><A HREF="http://www.cs.wisc.edu/~fischer/cs701/pldi95.ps"> The Power of Assignment Motion </A> <LI> <!WA20><A HREF="http://www.cs.wisc.edu/wpis/papers/toplas89.ps"> Integrating Non-Interfering Versions of Programs </A> <LI> <!WA21><A HREF="http://www.cs.wisc.edu/~fischer/cs701/shadow.ps"> Low-cost, Concurrent Checking of Pointer and Array Accesses in C Programs</A> <li> <!WA22><a href = "http://www.cs.washington.edu/homes/eggers/Research/dc.ps"> Fast, Effective Dynamic Compilation</a>----------------------> </UL></BODY></HTML>⌨️ 快捷键说明
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