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Date: Tue, 05 Nov 1996 20:37:09 GMTServer: NCSA/1.5Content-type: text/htmlLast-modified: Tue, 22 Oct 1996 22:00:23 GMTContent-length: 5695<HTML><HEAD><TITLE>WARTS</TITLE><!-- Changed by: James Larus, 22-Oct-1996 --></HEAD><BODY><H1>WARTS<BR> Wisconsin Architectural Research Tool Set</H1>Mark D. Hill, James R. Larus, Alvin R. Lebeck, Madhusudhan Talluri,and David A. Wood<BR><P>Computer Sciences Department<BR>University of Wisconsin<BR>1210 West Dayton St.<BR>Madison, WI 53706<BR>warts@cs.wisc.edu<BR><P> Wisconsin Architectural Research Tool Set (WARTS) is a collection oftools for profiling and tracing programs and analyzing programtraces. WARTS currently contains:<UL><LI> <!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><A HREF="http://www.cs.wisc.edu/~larus/qpt.html">QPT and QPT2</A>, Program profiling and tracing system.<LI> <!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><A HREF="#CPROF">CPROF</A>, Cache performance profiler.<LI> <!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><A HREF="#Tycho">Tycho and dineroIII</A>, Cache simulators.<LI> <!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><A HREF="http://www.cs.wisc.edu/~larus/eel.html">EEL</A>, Library for editing executable files.<LI> <!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><A HREF="http://www.cs.duke.edu/~alvy/fast-cache">Fast Cache</A>, Framework for memory system simulators.</UL><P> WARTS is distributed with the full source and a small amount ofdocumentation. The tools in WARTS are copyrighted and distributed underlicense. A copy of the license is available on ftp.cs.wisc.edu in:<!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><A HREF="ftp://ftp.cs.wisc.edu/pub/warts/license.ps">~ftp/pub/warts/license.ps</A>or it can be obtained by writing to the address above. WARTS isavailable without charge for university researchers and is availableto other researchers for a modest research donation. Contactwarts@cs.wisc.edu for more details.<P>We also maintain a list of <!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><A HREF="http://www.cs.wisc.edu/~larus/external_warts.html">changes and improvements to WARTS programs.</A><P><H2> <A NAME="CPROF">CPROF:</A> </H2>The CPROF system is a cache performance profiler written by AlvinR. Lebeck and David A. Wood that annotates source listings to identify thesource lines and data structures that cause frequent cache misses. TheCPROF system consists of two programs: Cprof, a uniprocessor cachesimulator, and Xcprof, an X windows user interface. Cprof processesprogram traces generated by QPT (see above) and annotates source lines anddata structures with the appropriate cache miss statistics. Xcprofprovides a generalized X windows interface for easy viewing of annotatedsource files.<P>The performance of current RISC processors is very sensitive to cache missratios. Programmers, compiler writers, and language designers mustexplicitly consider cache behavior to fully exploit a program'sperformance potential. CPROF provides detailed information about aprogram's cache behavior through full cache simulation. By annotatinglines of source code and data structures with the corresponding number ofcache misses, CPROF helps the user focus on problematic data structuresand algorithms. CPROF aids the programmer in identifying types oftransformations that can improve program cache behavior by classifyingcache misses as: compulsory, capacity, or conflict.<P>Note: This product contains software developed by the University ofCalifornia, Berkeley and its contributors.<P>Our experience using CPROF to tune this subset of the SPEC benchmarks isdetailed in:<P>[1] Alvin R. Lebeck and David A. Wood, "Cache Profiling and the SPECBenchmarks: A Case Study," IEEE Computer, vol. 27, no. 10, Oct. 1994,pp. 15-26.<P><H2> <A NAME="Tycho">Tycho and DineroIII:</A> </H2>Tycho and dineroIII are uniprocessor cache simulators written by MarkHill. The simulators report the behavior of one or more alternative cachedesigns in response to an input trace provided by the user (e.g., withQPT). A trace is a list of the memory references that a program orworkload makes while it is executing. Both simulators are written in C,use the same ASCII trace format, and have been distributed to dozens ofcompanies and universities.<P>The first simulator, tycho, simultaneously evaluates many alternativeuniprocessor caches, but severely restricts the design options that may bevaried [1]. Specifically, with one pass through an address trace, tychowill produce a table of miss ratios for caches of many sizes andassociativities, provided that all caches have the same block (line) size,do no prefetching, and use LRU replacement. Tycho is used, for example,with the SPEC benchmark suite to examine numerous caches [2]. Tycho ismost useful for reducing the size of a large cache design space. A secondversion of <EM>tycho</EM>--<EM>tychoII</EM>--provides higher performancewith the option of binary trace input and several other optimizations byMadhusudhan Talluri. <EM>TychoII</EM>, however, is more complex than<EM>tycho</EM> and has not been widely used.<P>The second simulator, dineroIII, evaluates only one uniprocessor cache ata time, but produces more performance metrics (e.g., traffic to and frommemory) and allows more cache design options to be varied (e.g.,write-back vs. write-through, LRU vs. random replacement, demand fetchingvs. prefetching). DineroIII is distributed for instructional use with apopular graduate computer architecture textbook [3]. DineroIII is mostuseful for carefully studying a few alternative cache designs.<P>[1] Mark D. Hill and Alan Jay Smith, "Evaluating Associativity in CPUCaches," IEEE Trans. on Computers, C-38, 12, December 1989, p.1612-1630.<P>[2] Jeffrey D. Gee, Mark D. Hill, Dionisios N. Pnevmatikatos, Alan JaySmith, "Cache Performance of the SPEC Benchmark Suite," to appear, IEEEMicro, August 1993, 3, 2.<P>[3] John L. Hennessy and David A. Patterson, Computer Architecture: AQuantitative Approach, Morgan Kaufmann, San Mateo, California, 1990<HR>Last modified: May 14 1996 by James Larus<ADDRESS> <!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><A HREF="http://www.cs.wisc.edu/~larus/larus.html">larus@cs.wisc.edu</A></ADDRESS></BODY></HTML>⌨️ 快捷键说明
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