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Date: Tue, 10 Dec 1996 03:20:41 GMTServer: NCSA/1.4.2Content-type: text/htmlLast-modified: Fri, 11 Nov 1994 20:07:17 GMTContent-length: 2405<html><head><title>Asynchronous Circuits</title></head><h1> <a name="top">Asynchronous Circuits</a><br></h1><hr><body>Asynchronous design has been an active area of research since at least themid 1950's, but has yet to achieve widespread use. In<a href="ftp://shrimp.cs.washington.edu/pub/olympia/AsynchArt.ps.Z">"Asynchronous Design Methodologies: An Overview"</a>we examine the benefits and problems inherent in asynchronous computations,and in some of the more notable design methodologies.These include Huffman asynchronous circuits, burst-mode circuits,Micropipelines, template-based and Trace Theory-based delay-insensitivecircuits, Signal Transition Graphs, Change Diagrams, and compilation-basedquasi-delay-insensitive circuits.<p>This paper is meant to be readable by someone with some experience with logicdesign, but not necessarily any exposure to asynchronous circuits. It mayalso serve as a good overview of the field for someone with a strong knowledgeof specific asynchronous methodology(ies).<p>Also relevant to asynchronous circuits is Montage, the first FPGA forasynchronous circuits. The paper <a href="ftp://shrimp.cs.washington.edu/pub/olympia/MontageJ.ps.Z">"An FPGA For Implementing Asynchronous Circuits"</a>,gives a good overview of the architecture and software tools, though the hypertext page<a href="http:/research/projects/lis/triptych/www/index.html">Triptych/Montage FPGA Architectures</a>will give a quick taste.<p><h2>Primary References</h2><p>S. Hauck. <a href="ftp://shrimp.cs.washington.edu/pub/olympia/AsynchArt.ps.Z">"Asynchronous Design Methodologies: An Overview"</a>,to appear in <em>Proceedings of the IEEE</em>, Vol. 83, No. 1, January 1995. <p>S. Hauck, S. Burns, G. Borriello, C. Ebeling. <a href="ftp://shrimp.cs.washington.edu/pub/olympia/MontageJ.ps.Z">"An FPGA For Implementing Asynchronous Circuits"</a>,<em>IEEE Design & Test of Computers</em>, Vol. 11, No. 3, Fall, 1994.<p><h2>Secondary References</h2><p>S. Hauck, G. Borriello, S. Burns, C. Ebeling. "Field-Programmable Gate Array for Synchronous and Asynchronous Operation",U.S. Patent Pending.<p>S. Hauck, G. Borriello, S. Burns and C. Ebeling. <a href="ftp://shrimp.cs.washington.edu/pub/olympia/vienna.ps.Z">"Montage: An FPGA for Synchronous and Asynchronous Circuits"</a>,<em>FPL '92</em>, Vienna, August 1992.<p><hr></html>⌨️ 快捷键说明
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