http:^^www.cs.washington.edu^education^courses^370^currentqtr^admin^syllabus.html

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Date: Mon, 02 Dec 1996 14:38:43 GMTServer: NCSA/1.4.2Content-type: text/html<html><head><TITLE>CSE370 Syllabus</TITLE></head><BODY><h2>CSE370 Syllabus</h2><hr><h3>Catalog Data</h3><p><b>CSE 370 Introduction to Digital Design (3)</b> Introductory course in digital logic and its specification and simulation.  Boolean algebra, combinatorial circuits including arithmetic circuits and regular structures,sequential circuits including finite-state-machines, use of programmablelogic devices.  Simulation and high-level specification techniques areemphasized.  Offered: AWSp.<hr><h3>Course Goals</h3><ol> <li>Understanding of digital logic at the gate and switch level including     both combinational and sequential logic elements. <li>Understanding of the clocking methodologies necessary to manage the     flow of information and preservation of circuit state. <li>An appreciation for the specification methods used in designing     digital logic and the basics of the compilation process that      transforms these specifications into logic networks. <li>Facility with a complete set of tools for digital logic design     with programmable logic devices as the implementation technology. <li>To begin to appreciate the difference between hardware and software     implementations of a function and the advantages and disadvantages     of each.</ol><hr><h3>Course Syllabus</h3><ol> <li>Introduction to modern digital logic design <li>Combinational logic  <ul>   <li>Switch logic and basic gates   <li>Boolean algebra   <li>Two-level logic   <li>Regular logic structures   <li>Multi-level networks and transformations   <li>Programmable logic devices   <li>Time response   <li>Case studies  </ul> <li>Sequential logic  <ul>   <li>Networks with feedback   <li>Basic latches and flip-flops   <li>Timing methodologies   <li>Registers and counters   <li>Programmable logic devices   <li>Case studies  </ul> <li>Finite state machine design  <ul>   <li>Concepts of FSMs   <li>Basic design approach   <li>Specification methods   <li>State minimization   <li>State encoding   <li>FSM partitioning   <li>Implementation of FSMs   <li>Programmable logic devices   <li>Case studies  </ul> <li>Elements of computers  <ul>   <li>Arithmetic circuits   <li>Arithmetic and logic units   <li>Register and bus structures   <li>Controllers/Sequencers   <li>Microprogramming  </ul> <li>Computer-aided design tools for logic design  <ul>   <li>Schematic entry   <li>State diagram entry   <li>Hardware description language entry   <li>Compilation to logic networks   <li>Simulation   <li>Mapping to programmable logic devices  </ul> <li>Practical topics  <ul>   <li>Non-gate logic   <li>Asynchronous inputs and metastability   <li>Memories: RAM and ROM   <li>Implementation technologies  </ul></ol><P><hr><address>  Comments to: <a href="mailto:cse370-webmaster@cs">cse370-webmaster@cs.washington.edu</a> (Last Update:   <!-- see man strftime for full format opts-->  10/28/96)</address></body></html>

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