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Date: Mon, 02 Dec 1996 15:13:30 GMTServer: NCSA/1.4.2Content-type: text/html<HTML><head><title>CSE567 Announcements</title></head><body bgcolor="#dddddd" text="#000000" link="#0000ee" vlink="501080"alink="ff0000"><h1>CSE 567: Principles of Digital Systems Design </h1><h3>Carl Ebeling, Fall 1996 </h2><hr><b>Nov. 1</b><ul><li><b>Homework 4, Problem 3.</b> You may assume that exactly one"last" bits is asserted, and that there is an initial "last" bit atthe very beginning of the circuit. (In general, you may make"reasonable" assumptions when you feel the problem spec is incompleteor ambiguous. Deciding which assumptions to make is part of design.)</ul><b>Oct. 31</b><ul><li><b>Homework 4, Problem 7. </b>Reset and Start are the same signal.I changed names in the middle of writing the problem.</ul><b>Oct. 28</b><ul><li>There's a new note on doing homework in the homework web page.<li>You are to work together as teams on Homework 4. Please look atthe problems individually first and sketch possible solutions andquestions. Then meet together and formulate solutions to each if youcan, and assign the writeup to one or more team members. Then meetagain to collate and review your solutions before you hand them in.The whole team is responsible for understanding the solution to allproblems.<li><B>Homework 4, Problem 7</b> The problem has been changed toadding 8-bit numbers. Also, you may make reasonable assumptions whenyou design this circuit, provided they are reasonable and you explainwhat they are.</ul><b>Oct. 25</b><ul><li><b>Timing optimization.</b>There are four delay paths that haveto be considered when optimizing the timing of a circuit. (We will cover registers soon.)<ol> <li>Register to register path delay. The clock period constrains this. <li>Input to register path delay. <li>Register to output path delay. <li>Input to output delay. (This is all there is for a combinational circuit.)</ol>The timing constraints for the last three delay paths must bespecified explicitly.</ul><b>Oct. 25</b><ul><li>If you run into trouble, don't hesitate to fire off an email msg to me orthe TAs, preferably all three. One or the other of us is logged in formost of the 24 hours/day and we can probably save you time. We know thatyou won't ask questions that can be easily answered by looking at ahandout. <LI>The cse567 mailing list is for all to use - you can post questionsto the class if you like, and more important you might want to post hintsor suggestions, although we'd rather you vet these through us to avoid thegeneration of tool rumors and superstitions. Unfortunately, we don't allshare a lab where information and ideas flow freely, but the email list isa substitute. </ul><b>Oct. 15</b><ul><li><b>Homework 2 clarification:</b><P>We will count the cost of a circuit as a) the number of gates and thenb) the number of gate inputs. ie. we minimuze the number of gatesfirst and then the number of inputs. And we assume negations are free.<P>It turns out that the cost of a gate (number of transistors) isdirectly proportional to the number of inputs, but the delay generallyincreases as n^2. And it gets worse - increasing the fanout of asignal, ie. the number of places it is used, also increases the delay.So large fanin (number of gate inputs) and fanout (number of placesgate output is used) are bad.</ul><b>Oct. 14</b><ul><li><b>Homework 2:</b> Replace problem 2 with the following problem:<p>Find the minimal sum-of-products form for:<p>SUM m(0,1,2,3,6,7,8,9,10,12,13,14) + d(5,15)</ul><b>Oct. 7</b><ul><li><b>Homework 1</b> problem 1 has been changed slightly. Check outthe online homework Web page.</ul><b>Oct. 4</b><ul><li><b>Room Change</b> to Loew 201. </ul><b>Oct. 3</b><ul><li><b>Extra Handouts</b> are available on top of the file cabinet inthe hall outside my door. I will continue to leave extras out there.<blink><li><b>Email addresses.</b> Please send me email containing an httppointer to your home Web page. If you don't have a Web page, this isthe time to make one!</blink><li><b>No quiz this Friday (10/4)</b></ul><b>Sept. 25</b><ul><li><b>Welcome</b> to CSE 567. Announcements will be posted here as needed.</ul></body><address><hr>ebeling@cs.washington.edu</address><p></html>⌨️ 快捷键说明
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