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Date: Tue, 10 Dec 1996 14:47:34 GMTServer: NCSA/1.4.2Content-type: text/htmlLast-modified: Sat, 05 Oct 1996 01:38:54 GMTContent-length: 2757<html><TITLE>Gaetano Borriello - Students</TITLE><h2>Gaetano Borriello's current and past students</h2><hr><h3>Current Ph.D. Students</h3><ul> <li>Suzanne Bunton: Dynamic Markov Models and Lossless Data Compression(co-advised with Richard Ladner) <li><!WA0><!WA0><!WA0><!WA0><a href="http://www.cs.washington.edu/homes/chou/">Pai H. Chou</a>:Co-Synthesis of Embedded Systems (Software Synthesis) <li>Kenneth J. Hines: Co-Simulation of Embedded Systems <li><!WA1><!WA1><!WA1><!WA1><a href="http://www.cs.washington.edu/homes/ortega/">Ross B. Ortega</a>:Co-Synthesis of Embedded Systems (Interface Synthesis)</ul><h3>Current M.S. Students</h3><ul> <li><!WA2><!WA2><!WA2><!WA2><a href="http://www.cs.washington.edu/homes/ian/">Ian MacDuff</a>: Hardware/Software Tradeoffs in Embedded Systems: A Case Study</ul><h3>Undergraduate Projects</h3><ul> <li><!WA3><!WA3><!WA3><!WA3><a href="http://www.cs.washington.edu/homes/hegar/">Ryan Hegar</a>: Timing Diagram Specification of Logic Synthesis <li><!WA4><!WA4><!WA4><!WA4><a href="http://weber.u.washington.edu/~mattman/">Matt Phillips</a>: Communication between the Web and an Embedded Controller</ul><hr><h3>Ph.D. Graduates</h3><ul> <li><!WA5><!WA5><!WA5><!WA5><a href="http://web.eecs.nwu.edu/~hauck/">Scott A. Hauck</a> (1995):Multi-FPGA Systems (co-advised with Carl Ebeling)<br> Assistant Professor at Northwestern University, Evanston, IL <li><!WA6><!WA6><!WA6><!WA6><a href="http://www.cs.washington.edu/homes/walkup/">Elizabeth A. Walkup</a> (1995): Optimization of Linear Max-Plus Systems with Application to Timing Analysis<br> Senior CAD Engineer at Intel Corporation, Beaverton, OR <li><!WA7><!WA7><!WA7><!WA7><a href="http://grasshopper.cs.swt.edu/faculty/amon/amon.html">Tod T. Amon</a> (1993): Specification, Simulation, and Verification of Timing Behavior<br> Assistant Professor at Southwest Texas State University, San Marcos, TX</ul><h3>M.S. Graduates</h3><ul> <li>Daniel Miles (1993): A Task Allocator for Real-Time Multi-Processor Simulations<br> Member of Technical Staff, Boeing Commercial Aircraft, Seattle, WA <li>Christopher Hebert (1992): Parallel Programming/Partitioning for Unit-Delay Logic Simulation<br> Member of Technical Staff, Digital Equipment Corporation, Hudson, MA<br> now at <!WA8><!WA8><!WA8><!WA8><a href="http://www.openmarket.com">Open Market, Inc.</a>, Cambridge, MA <li>Gerald Carson (1990): A Testable CMOS Asynchronous Counter<br> Self-employed, Seattle, WA <li>Sitaram Raju (1990): Timing Optimization in Multi-Phase SequentialLogic<br> Completed PhD with A. Shaw (1994), Member of Technical Staff, Microsoft Corporation, Redmond, WA</ul><address><hr><!WA9><!WA9><!WA9><!WA9><a href="mailto:gaetano@cs.washington.edu">gaetano@cs.washington.edu</a>- - - <!WA10><!WA10><!WA10><!WA10><a href="http://www.cs.washington.edu/homes/gaetano">back to home page</a></address></body></html>⌨️ 快捷键说明
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